An FPGA Implementation of Secured Steganography Communication System
<p><strong> </strong>Steganography is the idea of hiding secret message in multimedia cover which will be transmitted through the Internet. The cover carriers can be image, video, sound or text data. This paper presents an implementation of color image steganographic system on F...
| Main Authors: | , |
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| Format: | Article |
| Language: | English |
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Tikrit University
2013-04-01
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| Series: | Tikrit Journal of Engineering Sciences |
| Subjects: | |
| Online Access: | http://www.tj-es.com/ojs/index.php/tjes/article/view/95 |
| _version_ | 1797707222565781504 |
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| author | Ahlam Fadhil Mahmood Nada Abdul Kanai |
| author_facet | Ahlam Fadhil Mahmood Nada Abdul Kanai |
| author_sort | Ahlam Fadhil Mahmood |
| collection | DOAJ |
| description | <p><strong> </strong>Steganography is the idea of hiding secret message in multimedia cover which will be transmitted through the Internet. The cover carriers can be image, video, sound or text data. This paper presents an implementation of color image steganographic system on Field Programmable Gate Array and the information hiding/extracting techniques in various images. The proposed algorithm is based on merge between the idea from the random pixel manipulation methods and the Least Significant Bit (LSB) matching of Steganography embedding and extracting method.</p><p> In a proposed steganography hardware approach, Linear Feedback Shift Register (LFSR) method has been used in stego architecture to hide the information in the image. The LFSRs are utilized in this approach as address generators. Different LFSR arrangements using different connection unit have been implemented at the hardware level for hiding/extracting the secret data. Multilayer embedding is implemented in parallel manner with a three-stage pipeline on FPGA.</p> This work showed attractive results especially in the high throughputs, better stego-image quality, requires little calculation and less utilization of FPGA area. The imperceptibility of the technique combined with high payload, robustness of embedded data and accurate data retrieval renders the proposed Steganography system is suitable for covert communication and secures data transmission applications |
| first_indexed | 2024-03-12T06:03:12Z |
| format | Article |
| id | doaj.art-d1ef8626ae364fe9b4c979d39d8ebefd |
| institution | Directory Open Access Journal |
| issn | 1813-162X 2312-7589 |
| language | English |
| last_indexed | 2024-03-12T06:03:12Z |
| publishDate | 2013-04-01 |
| publisher | Tikrit University |
| record_format | Article |
| series | Tikrit Journal of Engineering Sciences |
| spelling | doaj.art-d1ef8626ae364fe9b4c979d39d8ebefd2023-09-03T03:58:03ZengTikrit UniversityTikrit Journal of Engineering Sciences1813-162X2312-75892013-04-01194142358An FPGA Implementation of Secured Steganography Communication SystemAhlam Fadhil MahmoodNada Abdul Kanai<p><strong> </strong>Steganography is the idea of hiding secret message in multimedia cover which will be transmitted through the Internet. The cover carriers can be image, video, sound or text data. This paper presents an implementation of color image steganographic system on Field Programmable Gate Array and the information hiding/extracting techniques in various images. The proposed algorithm is based on merge between the idea from the random pixel manipulation methods and the Least Significant Bit (LSB) matching of Steganography embedding and extracting method.</p><p> In a proposed steganography hardware approach, Linear Feedback Shift Register (LFSR) method has been used in stego architecture to hide the information in the image. The LFSRs are utilized in this approach as address generators. Different LFSR arrangements using different connection unit have been implemented at the hardware level for hiding/extracting the secret data. Multilayer embedding is implemented in parallel manner with a three-stage pipeline on FPGA.</p> This work showed attractive results especially in the high throughputs, better stego-image quality, requires little calculation and less utilization of FPGA area. The imperceptibility of the technique combined with high payload, robustness of embedded data and accurate data retrieval renders the proposed Steganography system is suitable for covert communication and secures data transmission applicationshttp://www.tj-es.com/ojs/index.php/tjes/article/view/95Steganography, Steganalysis, LFSR, LSB matching, FPGA |
| spellingShingle | Ahlam Fadhil Mahmood Nada Abdul Kanai An FPGA Implementation of Secured Steganography Communication System Tikrit Journal of Engineering Sciences Steganography, Steganalysis, LFSR, LSB matching, FPGA |
| title | An FPGA Implementation of Secured Steganography Communication System |
| title_full | An FPGA Implementation of Secured Steganography Communication System |
| title_fullStr | An FPGA Implementation of Secured Steganography Communication System |
| title_full_unstemmed | An FPGA Implementation of Secured Steganography Communication System |
| title_short | An FPGA Implementation of Secured Steganography Communication System |
| title_sort | fpga implementation of secured steganography communication system |
| topic | Steganography, Steganalysis, LFSR, LSB matching, FPGA |
| url | http://www.tj-es.com/ojs/index.php/tjes/article/view/95 |
| work_keys_str_mv | AT ahlamfadhilmahmood anfpgaimplementationofsecuredsteganographycommunicationsystem AT nadaabdulkanai anfpgaimplementationofsecuredsteganographycommunicationsystem AT ahlamfadhilmahmood fpgaimplementationofsecuredsteganographycommunicationsystem AT nadaabdulkanai fpgaimplementationofsecuredsteganographycommunicationsystem |