ANALYSIS and SIMULATION of MOSFET DIFFERENTIAL AMPLIFIER
With the evolution of electronics today, a MOSFET transistor is useful in many applications such as computers due to several advantages. In this research, an NMOS transistor differential amplifier circuit with passive load that uses a modified Wilson current mirror as a biasing circuit is analyzed,...
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| Format: | Article |
| Language: | Arabic |
| Published: |
Mustansiriyah University/College of Engineering
2019-11-01
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| Series: | Journal of Engineering and Sustainable Development |
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| Online Access: | http://www.jeasd.org/images/2019edition/issue_6/%D9%851.pdf |
| _version_ | 1818359869183361024 |
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| author | Muneer Aboud Hashem |
| author_facet | Muneer Aboud Hashem |
| author_sort | Muneer Aboud Hashem |
| collection | DOAJ |
| description | With the evolution of electronics today, a MOSFET transistor is useful in many applications such as computers due to several advantages. In this research, an NMOS transistor differential amplifier circuit with passive load that uses a modified Wilson current mirror as a biasing circuit is analyzed, designed and implemented. The width-to-length ratios of transistors are calculated by considering the voltage and current values at the output of the biasing circuit, and parameters such as conduction parameter, base width modulation parameter, and threshold voltage. A MATLAB version 8.1.0.604(R2010a) programming tool is employed for calculations and the simulations are carried out via Multisim 9 software tool. The output resistance obtained for current mirror is 2.297 "MΩ" . CMRR, output resistance, and power dissipation for differential amplifier circuit are 33.351 "dB" , 61.274 "kΩ" and 6.66 "mW" , respectively. The results show that the width-to-length ratio, differential gain and common mode rejection ratio are decreased with decreasing applied voltage at the output of the biasing circuit while approximately same values obtained for output resistance and common mode gain. The results show a good agreement between the measured values from simulation and the calculated one from design |
| first_indexed | 2024-12-13T20:51:45Z |
| format | Article |
| id | doaj.art-d4c32c371f90424a9919554c5fea907d |
| institution | Directory Open Access Journal |
| issn | 2520-0925 2520-0925 |
| language | Arabic |
| last_indexed | 2024-12-13T20:51:45Z |
| publishDate | 2019-11-01 |
| publisher | Mustansiriyah University/College of Engineering |
| record_format | Article |
| series | Journal of Engineering and Sustainable Development |
| spelling | doaj.art-d4c32c371f90424a9919554c5fea907d2022-12-21T23:31:51ZaraMustansiriyah University/College of EngineeringJournal of Engineering and Sustainable Development2520-09252520-09252019-11-01230611010.31272/jeasd.23.6.1ANALYSIS and SIMULATION of MOSFET DIFFERENTIAL AMPLIFIERMuneer Aboud Hashem0Assistant Prof., Electrical Engineering Department, Mustansiriyah University, Baghdad, IraqWith the evolution of electronics today, a MOSFET transistor is useful in many applications such as computers due to several advantages. In this research, an NMOS transistor differential amplifier circuit with passive load that uses a modified Wilson current mirror as a biasing circuit is analyzed, designed and implemented. The width-to-length ratios of transistors are calculated by considering the voltage and current values at the output of the biasing circuit, and parameters such as conduction parameter, base width modulation parameter, and threshold voltage. A MATLAB version 8.1.0.604(R2010a) programming tool is employed for calculations and the simulations are carried out via Multisim 9 software tool. The output resistance obtained for current mirror is 2.297 "MΩ" . CMRR, output resistance, and power dissipation for differential amplifier circuit are 33.351 "dB" , 61.274 "kΩ" and 6.66 "mW" , respectively. The results show that the width-to-length ratio, differential gain and common mode rejection ratio are decreased with decreasing applied voltage at the output of the biasing circuit while approximately same values obtained for output resistance and common mode gain. The results show a good agreement between the measured values from simulation and the calculated one from designhttp://www.jeasd.org/images/2019edition/issue_6/%D9%851.pdfnmos transistorcurrent mirrordifferential paircommon mode rejection ratio |
| spellingShingle | Muneer Aboud Hashem ANALYSIS and SIMULATION of MOSFET DIFFERENTIAL AMPLIFIER Journal of Engineering and Sustainable Development nmos transistor current mirror differential pair common mode rejection ratio |
| title | ANALYSIS and SIMULATION of MOSFET DIFFERENTIAL AMPLIFIER |
| title_full | ANALYSIS and SIMULATION of MOSFET DIFFERENTIAL AMPLIFIER |
| title_fullStr | ANALYSIS and SIMULATION of MOSFET DIFFERENTIAL AMPLIFIER |
| title_full_unstemmed | ANALYSIS and SIMULATION of MOSFET DIFFERENTIAL AMPLIFIER |
| title_short | ANALYSIS and SIMULATION of MOSFET DIFFERENTIAL AMPLIFIER |
| title_sort | analysis and simulation of mosfet differential amplifier |
| topic | nmos transistor current mirror differential pair common mode rejection ratio |
| url | http://www.jeasd.org/images/2019edition/issue_6/%D9%851.pdf |
| work_keys_str_mv | AT muneeraboudhashem analysisandsimulationofmosfetdifferentialamplifier |