An Offset Cancelation Technique for Latch Type Sense Amplifiers
An offset compensation technique for a latch type sense amplifier is proposed in this paper. The proposed scheme is based on the recalibration of the charging/discharging current of the critical nodes which are affected by the device mismatches. The circuit has been designed in a 65 nm CMOS technolo...
| Main Authors: | , , |
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| Format: | Article |
| Language: | English |
| Published: |
Spolecnost pro radioelektronicke inzenyrstvi
2014-12-01
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| Series: | Radioengineering |
| Subjects: | |
| Online Access: | http://www.radioeng.cz/fulltexts/2014/14_04_1121_1129.pdf |
| _version_ | 1819178673230577664 |
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| author | G. Souliotis C. Laoudias N. Terzopoulos |
| author_facet | G. Souliotis C. Laoudias N. Terzopoulos |
| author_sort | G. Souliotis |
| collection | DOAJ |
| description | An offset compensation technique for a latch type sense amplifier is proposed in this paper. The proposed scheme is based on the recalibration of the charging/discharging current of the critical nodes which are affected by the device mismatches. The circuit has been designed in a 65 nm CMOS technology with 1.2 V core transistors. The auto-calibration procedure is fully digital. Simulation results are given verifying the operation for sampling a 5 Gb/s signal dissipating only 360 uW. |
| first_indexed | 2024-12-22T21:46:17Z |
| format | Article |
| id | doaj.art-d514fff15be2445785c79986acbe218d |
| institution | Directory Open Access Journal |
| issn | 1210-2512 |
| language | English |
| last_indexed | 2024-12-22T21:46:17Z |
| publishDate | 2014-12-01 |
| publisher | Spolecnost pro radioelektronicke inzenyrstvi |
| record_format | Article |
| series | Radioengineering |
| spelling | doaj.art-d514fff15be2445785c79986acbe218d2022-12-21T18:11:28ZengSpolecnost pro radioelektronicke inzenyrstviRadioengineering1210-25122014-12-0123411211129An Offset Cancelation Technique for Latch Type Sense AmplifiersG. SouliotisC. LaoudiasN. TerzopoulosAn offset compensation technique for a latch type sense amplifier is proposed in this paper. The proposed scheme is based on the recalibration of the charging/discharging current of the critical nodes which are affected by the device mismatches. The circuit has been designed in a 65 nm CMOS technology with 1.2 V core transistors. The auto-calibration procedure is fully digital. Simulation results are given verifying the operation for sampling a 5 Gb/s signal dissipating only 360 uW.www.radioeng.cz/fulltexts/2014/14_04_1121_1129.pdfOffset cancelationSense amplifiersClocked comparatorsLatch circuits |
| spellingShingle | G. Souliotis C. Laoudias N. Terzopoulos An Offset Cancelation Technique for Latch Type Sense Amplifiers Radioengineering Offset cancelation Sense amplifiers Clocked comparators Latch circuits |
| title | An Offset Cancelation Technique for Latch Type Sense Amplifiers |
| title_full | An Offset Cancelation Technique for Latch Type Sense Amplifiers |
| title_fullStr | An Offset Cancelation Technique for Latch Type Sense Amplifiers |
| title_full_unstemmed | An Offset Cancelation Technique for Latch Type Sense Amplifiers |
| title_short | An Offset Cancelation Technique for Latch Type Sense Amplifiers |
| title_sort | offset cancelation technique for latch type sense amplifiers |
| topic | Offset cancelation Sense amplifiers Clocked comparators Latch circuits |
| url | http://www.radioeng.cz/fulltexts/2014/14_04_1121_1129.pdf |
| work_keys_str_mv | AT gsouliotis anoffsetcancelationtechniqueforlatchtypesenseamplifiers AT claoudias anoffsetcancelationtechniqueforlatchtypesenseamplifiers AT nterzopoulos anoffsetcancelationtechniqueforlatchtypesenseamplifiers AT gsouliotis offsetcancelationtechniqueforlatchtypesenseamplifiers AT claoudias offsetcancelationtechniqueforlatchtypesenseamplifiers AT nterzopoulos offsetcancelationtechniqueforlatchtypesenseamplifiers |