Front-End Gateway System With Serial Communication Protocol Conversion and Edge Computing Platforms

This study presents a front-end gateway system with asynchronous and synchronous serial communication protocol conversion between a universal asynchronous receiver/transmitter (UART) protocol and an inter-integrated circuit (I2C) protocol. The valid data and sensing data can be integrated using the...

Full description

Bibliographic Details
Main Authors: Guo-Ming Sung, Li-Fen Tung, Chih-Jung Huang, Chih-Ping Yu
Format: Article
Language:English
Published: IEEE 2023-01-01
Series:IEEE Access
Subjects:
Online Access:https://ieeexplore.ieee.org/document/10225735/
_version_ 1797692899446489088
author Guo-Ming Sung
Li-Fen Tung
Chih-Jung Huang
Chih-Ping Yu
author_facet Guo-Ming Sung
Li-Fen Tung
Chih-Jung Huang
Chih-Ping Yu
author_sort Guo-Ming Sung
collection DOAJ
description This study presents a front-end gateway system with asynchronous and synchronous serial communication protocol conversion between a universal asynchronous receiver/transmitter (UART) protocol and an inter-integrated circuit (I2C) protocol. The valid data and sensing data can be integrated using the I2C protocol and sent to an edge computing platform for automated data analysis. Our system reduces the data processing time and the number of buses. The system has an edge computing platform that handles simple linear regression, base conversion, a neural network, and a text database and communicates with multiple peripheral devices. The I2C master and slave are constructed on the edge computing platform and implement arbitration by using the carrier-sense multiple access with collision avoidance protocol to prevent data collision. According to the results obtained from the Signal Tap logic analyzer in experiments conducted using a field-programmable gate array board, a completed 330-bit UART packet requires <inline-formula> <tex-math notation="LaTeX">$755.2~\mu \text{s}$ </tex-math></inline-formula> to be received, and the throughput is 436.97 kbps. By contrast, a 90-bit I2C packet requires <inline-formula> <tex-math notation="LaTeX">$184.6~\mu \text{s}$ </tex-math></inline-formula> to be received, and the throughput is 487.54 kbps. The front-end gateway sends integrated packets by using the I2C protocol, and the operating freuency (serial clock) of the I2C slave can reach up to 3.6 MHz bidirectionally. An integrated 153-bit packet requires <inline-formula> <tex-math notation="LaTeX">$42.96~\mu \text{s}$ </tex-math></inline-formula> to be received by the edge computing platform, and the throughput is 3.5614 Mbps, which is approximately 8.15 times higher than that of the UART packet. We also fabricated a front-end gateway ASIC by using the TSMC 90-nm 1P9M CMOS process.
first_indexed 2024-03-12T02:35:15Z
format Article
id doaj.art-d5c0b53b80364a88b571901ac926e96d
institution Directory Open Access Journal
issn 2169-3536
language English
last_indexed 2024-03-12T02:35:15Z
publishDate 2023-01-01
publisher IEEE
record_format Article
series IEEE Access
spelling doaj.art-d5c0b53b80364a88b571901ac926e96d2023-09-04T23:02:03ZengIEEEIEEE Access2169-35362023-01-0111931939320310.1109/ACCESS.2023.330763110225735Front-End Gateway System With Serial Communication Protocol Conversion and Edge Computing PlatformsGuo-Ming Sung0https://orcid.org/0000-0002-2442-2983Li-Fen Tung1Chih-Jung Huang2Chih-Ping Yu3Department of Electrical Engineering, National Taipei University of Technology, Taipei, TaiwanDepartment of Electrical Engineering, National Taipei University of Technology, Taipei, TaiwanDepartment of Electrical Engineering, National Taipei University of Technology, Taipei, TaiwanDepartment of Electrical Engineering, National Taipei University of Technology, Taipei, TaiwanThis study presents a front-end gateway system with asynchronous and synchronous serial communication protocol conversion between a universal asynchronous receiver/transmitter (UART) protocol and an inter-integrated circuit (I2C) protocol. The valid data and sensing data can be integrated using the I2C protocol and sent to an edge computing platform for automated data analysis. Our system reduces the data processing time and the number of buses. The system has an edge computing platform that handles simple linear regression, base conversion, a neural network, and a text database and communicates with multiple peripheral devices. The I2C master and slave are constructed on the edge computing platform and implement arbitration by using the carrier-sense multiple access with collision avoidance protocol to prevent data collision. According to the results obtained from the Signal Tap logic analyzer in experiments conducted using a field-programmable gate array board, a completed 330-bit UART packet requires <inline-formula> <tex-math notation="LaTeX">$755.2~\mu \text{s}$ </tex-math></inline-formula> to be received, and the throughput is 436.97 kbps. By contrast, a 90-bit I2C packet requires <inline-formula> <tex-math notation="LaTeX">$184.6~\mu \text{s}$ </tex-math></inline-formula> to be received, and the throughput is 487.54 kbps. The front-end gateway sends integrated packets by using the I2C protocol, and the operating freuency (serial clock) of the I2C slave can reach up to 3.6 MHz bidirectionally. An integrated 153-bit packet requires <inline-formula> <tex-math notation="LaTeX">$42.96~\mu \text{s}$ </tex-math></inline-formula> to be received by the edge computing platform, and the throughput is 3.5614 Mbps, which is approximately 8.15 times higher than that of the UART packet. We also fabricated a front-end gateway ASIC by using the TSMC 90-nm 1P9M CMOS process.https://ieeexplore.ieee.org/document/10225735/Universal asynchronous receiver/transmitter (UART)inter-integrated circuit (I²C)asynchronous communicationedge computingasynchronous transfer modeZigBee
spellingShingle Guo-Ming Sung
Li-Fen Tung
Chih-Jung Huang
Chih-Ping Yu
Front-End Gateway System With Serial Communication Protocol Conversion and Edge Computing Platforms
IEEE Access
Universal asynchronous receiver/transmitter (UART)
inter-integrated circuit (I²C)
asynchronous communication
edge computing
asynchronous transfer mode
ZigBee
title Front-End Gateway System With Serial Communication Protocol Conversion and Edge Computing Platforms
title_full Front-End Gateway System With Serial Communication Protocol Conversion and Edge Computing Platforms
title_fullStr Front-End Gateway System With Serial Communication Protocol Conversion and Edge Computing Platforms
title_full_unstemmed Front-End Gateway System With Serial Communication Protocol Conversion and Edge Computing Platforms
title_short Front-End Gateway System With Serial Communication Protocol Conversion and Edge Computing Platforms
title_sort front end gateway system with serial communication protocol conversion and edge computing platforms
topic Universal asynchronous receiver/transmitter (UART)
inter-integrated circuit (I²C)
asynchronous communication
edge computing
asynchronous transfer mode
ZigBee
url https://ieeexplore.ieee.org/document/10225735/
work_keys_str_mv AT guomingsung frontendgatewaysystemwithserialcommunicationprotocolconversionandedgecomputingplatforms
AT lifentung frontendgatewaysystemwithserialcommunicationprotocolconversionandedgecomputingplatforms
AT chihjunghuang frontendgatewaysystemwithserialcommunicationprotocolconversionandedgecomputingplatforms
AT chihpingyu frontendgatewaysystemwithserialcommunicationprotocolconversionandedgecomputingplatforms