Leveraging the page buffer data cache for enhanced programmability in NAND flash memories with on‐chip microcontrollers

Leveraging the page buffer data cache for enhanced programmability in NAND flash memories with on‐chip microcontrollers

Abstract This paper proposes a simple yet effective scheme for NAND Flash memories that employ on‐chip microcontroller units (MCUs) to manage internal array operations. Through minimal hardware overhead, the proposed scheme enables—without mask revision— executing new or updated array operations by...

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Bibliographic Details
Main Author: Geonu Kim
Format: Article
Language:English
Published: Wiley 2024-02-01
Series:Electronics Letters
Subjects:
microcontrollers
NAND circuits
Online Access:https://doi.org/10.1049/ell2.13111

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