Transformer: An OS-Supported Reconfigurable Hybrid Memory Architecture
<i>Non-volatile memories</i> (NVMs) have aroused vast interest in hybrid memory systems due to their promising features of byte-addressability, high storage density, low cost per byte, and near-zero standby energy consumption. However, since NVMs have limited write endurance, high write...
| Main Authors: | , , , , |
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| Format: | Article |
| Language: | English |
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MDPI AG
2022-12-01
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| Series: | Applied Sciences |
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| Online Access: | https://www.mdpi.com/2076-3417/12/24/12995 |
| _version_ | 1797461588602519552 |
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| author | Ye Chi Haikun Liu Ganwei Peng Xiaofei Liao Hai Jin |
| author_facet | Ye Chi Haikun Liu Ganwei Peng Xiaofei Liao Hai Jin |
| author_sort | Ye Chi |
| collection | DOAJ |
| description | <i>Non-volatile memories</i> (NVMs) have aroused vast interest in hybrid memory systems due to their promising features of byte-addressability, high storage density, low cost per byte, and near-zero standby energy consumption. However, since NVMs have limited write endurance, high write latency, and high write energy consumption, it is still challenging to directly replace traditional <i>dynamic random access memory</i> (DRAM) with NVMs. Many studies propose to utilize NVM and DRAM in a hybrid memory system, and explore sophisticated memory management schemes to alleviate the impact of slow NVM on the performance of applications. A few studies architected DRAM and NVM in a cache/memory hierarchy. However, the storage and performance overhead of the cache metadata (i.e., tags) management is rather expensive in this hierarchical architecture. Some other studies architected NVM and DRAM in a single (flat) address space to form a parallel architecture. However, the hot page monitoring and migration are critical for the performance of applications in this architecture. In this paper, we propose Transformer, an OS-supported reconfigurable hybrid memory architecture to efficiently use DRAM and NVM without redesigning the hardware architecture. To identify frequently accessed (hot) memory pages for migration, we propose to count the number of page accesses in OSes by sampling the access bit of pages periodically. We further migrate the identified hot pages from NVM to DRAM to improve the performance of hybrid memory system. More importantly, Transformer can simulate a hierarchical hybrid memory architecture while DRAM and NVM are physically managed in a flat address space, and can dynamically shift the logical memory architecture between parallel and hierarchical architectures according to applications’ memory access patterns. Experimental results show that Transformer can improve the application performance by 62% on average (up to 2.7×) compared with an NVM-only system, and can also improve performance by up to 79% and 42% (21% and 24% on average) compared with hierarchical and parallel architectures, respectively. |
| first_indexed | 2024-03-09T17:21:32Z |
| format | Article |
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| institution | Directory Open Access Journal |
| issn | 2076-3417 |
| language | English |
| last_indexed | 2024-03-09T17:21:32Z |
| publishDate | 2022-12-01 |
| publisher | MDPI AG |
| record_format | Article |
| series | Applied Sciences |
| spelling | doaj.art-db0fbf3fd1874bd68ac5c80d975f2bbe2023-11-24T13:08:22ZengMDPI AGApplied Sciences2076-34172022-12-0112241299510.3390/app122412995Transformer: An OS-Supported Reconfigurable Hybrid Memory ArchitectureYe Chi0Haikun Liu1Ganwei Peng2Xiaofei Liao3Hai Jin4National Engineering Research Center for Big Data Technology and System, Services Computing Technology and System Lab, Cluster and Grid Computing Lab, School of Computer Science and Technology, Huazhong University of Science and Technology, Wuhan 430074, ChinaNational Engineering Research Center for Big Data Technology and System, Services Computing Technology and System Lab, Cluster and Grid Computing Lab, School of Computer Science and Technology, Huazhong University of Science and Technology, Wuhan 430074, ChinaNational Engineering Research Center for Big Data Technology and System, Services Computing Technology and System Lab, Cluster and Grid Computing Lab, School of Computer Science and Technology, Huazhong University of Science and Technology, Wuhan 430074, ChinaNational Engineering Research Center for Big Data Technology and System, Services Computing Technology and System Lab, Cluster and Grid Computing Lab, School of Computer Science and Technology, Huazhong University of Science and Technology, Wuhan 430074, ChinaNational Engineering Research Center for Big Data Technology and System, Services Computing Technology and System Lab, Cluster and Grid Computing Lab, School of Computer Science and Technology, Huazhong University of Science and Technology, Wuhan 430074, China<i>Non-volatile memories</i> (NVMs) have aroused vast interest in hybrid memory systems due to their promising features of byte-addressability, high storage density, low cost per byte, and near-zero standby energy consumption. However, since NVMs have limited write endurance, high write latency, and high write energy consumption, it is still challenging to directly replace traditional <i>dynamic random access memory</i> (DRAM) with NVMs. Many studies propose to utilize NVM and DRAM in a hybrid memory system, and explore sophisticated memory management schemes to alleviate the impact of slow NVM on the performance of applications. A few studies architected DRAM and NVM in a cache/memory hierarchy. However, the storage and performance overhead of the cache metadata (i.e., tags) management is rather expensive in this hierarchical architecture. Some other studies architected NVM and DRAM in a single (flat) address space to form a parallel architecture. However, the hot page monitoring and migration are critical for the performance of applications in this architecture. In this paper, we propose Transformer, an OS-supported reconfigurable hybrid memory architecture to efficiently use DRAM and NVM without redesigning the hardware architecture. To identify frequently accessed (hot) memory pages for migration, we propose to count the number of page accesses in OSes by sampling the access bit of pages periodically. We further migrate the identified hot pages from NVM to DRAM to improve the performance of hybrid memory system. More importantly, Transformer can simulate a hierarchical hybrid memory architecture while DRAM and NVM are physically managed in a flat address space, and can dynamically shift the logical memory architecture between parallel and hierarchical architectures according to applications’ memory access patterns. Experimental results show that Transformer can improve the application performance by 62% on average (up to 2.7×) compared with an NVM-only system, and can also improve performance by up to 79% and 42% (21% and 24% on average) compared with hierarchical and parallel architectures, respectively.https://www.mdpi.com/2076-3417/12/24/12995non-volatile memoryhybrid memorymemory management |
| spellingShingle | Ye Chi Haikun Liu Ganwei Peng Xiaofei Liao Hai Jin Transformer: An OS-Supported Reconfigurable Hybrid Memory Architecture Applied Sciences non-volatile memory hybrid memory memory management |
| title | Transformer: An OS-Supported Reconfigurable Hybrid Memory Architecture |
| title_full | Transformer: An OS-Supported Reconfigurable Hybrid Memory Architecture |
| title_fullStr | Transformer: An OS-Supported Reconfigurable Hybrid Memory Architecture |
| title_full_unstemmed | Transformer: An OS-Supported Reconfigurable Hybrid Memory Architecture |
| title_short | Transformer: An OS-Supported Reconfigurable Hybrid Memory Architecture |
| title_sort | transformer an os supported reconfigurable hybrid memory architecture |
| topic | non-volatile memory hybrid memory memory management |
| url | https://www.mdpi.com/2076-3417/12/24/12995 |
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