CNTFET-based SRAM cell design using INDEP technique

CNTFET-based SRAM cell design using INDEP technique

As the size of the transistor decreases in the nanoscale regime, certain parameters, such as, cell stability, power dissipation, and delay, have changed. This poses a significant challenge when attempting to scale down metal oxide semiconductor field effect transistor (MOSFET). The carbon nanotube f...

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Bibliographic Details
Main Authors:	Mehwish Maqbool, Vijay Kumar Sharma, Neeraj Kaushik
Format:	Article
Language:	English
Published:	Elsevier 2024-03-01
Series:	e-Prime: Advances in Electrical Engineering, Electronics and Energy
Subjects:	SRAM CNTFET SNM INDEP VLSI CNT
Online Access:	http://www.sciencedirect.com/science/article/pii/S2772671124000597

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