ACE: ARIA-CTR Encryption for Low-End Embedded Processors
In this paper, we present the first optimized implementation of ARIA block cipher on low-end 8-bit Alf and Vegard’s RISC processor (AVR) microcontrollers. To achieve high-speed implementation, primitive operations, including rotation operation, a substitute layer, and a diffusion layer, are carefull...
| Main Authors: | , , , |
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| Format: | Article |
| Language: | English |
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MDPI AG
2020-07-01
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| Series: | Sensors |
| Subjects: | |
| Online Access: | https://www.mdpi.com/1424-8220/20/13/3788 |
| _version_ | 1797563257560498176 |
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| author | Hwajeong Seo Hyeokdong Kwon Hyunji Kim Jaehoon Park |
| author_facet | Hwajeong Seo Hyeokdong Kwon Hyunji Kim Jaehoon Park |
| author_sort | Hwajeong Seo |
| collection | DOAJ |
| description | In this paper, we present the first optimized implementation of ARIA block cipher on low-end 8-bit Alf and Vegard’s RISC processor (AVR) microcontrollers. To achieve high-speed implementation, primitive operations, including rotation operation, a substitute layer, and a diffusion layer, are carefully optimized for the target low-end embedded processor. The proposed ARIA implementation supports the electronic codebook (ECB) and the counter (CTR) modes of operation. In particular, the CTR mode of operation is further optimized with the pre-computed table of two add-round-key, one substitute layer, and one diffusion layer operations. Finally, the proposed ARIA-CTR implementations on 8-bit AVR microcontrollers achieved 187.1, 216.8, and 246.6 clock cycles per byte for 128-bit, 192-bit, and 256-bit security levels, respectively. Compared with previous reference implementations, the execution timing is improved by 69.8%, 69.6%, and 69.5% for 128-bit, 192-bit, and 256-bit security levels, respectively. |
| first_indexed | 2024-03-10T18:40:02Z |
| format | Article |
| id | doaj.art-dc03b2d9a3a84366ae06ee321f7cafc2 |
| institution | Directory Open Access Journal |
| issn | 1424-8220 |
| language | English |
| last_indexed | 2024-03-10T18:40:02Z |
| publishDate | 2020-07-01 |
| publisher | MDPI AG |
| record_format | Article |
| series | Sensors |
| spelling | doaj.art-dc03b2d9a3a84366ae06ee321f7cafc22023-11-20T05:58:44ZengMDPI AGSensors1424-82202020-07-012013378810.3390/s20133788ACE: ARIA-CTR Encryption for Low-End Embedded ProcessorsHwajeong Seo0Hyeokdong Kwon1Hyunji Kim2Jaehoon Park3Division of IT Convergence Engineering, Hansung University, Seoul 02876, KoreaDivision of IT Convergence Engineering, Hansung University, Seoul 02876, KoreaDivision of IT Convergence Engineering, Hansung University, Seoul 02876, KoreaDivision of IT Convergence Engineering, Hansung University, Seoul 02876, KoreaIn this paper, we present the first optimized implementation of ARIA block cipher on low-end 8-bit Alf and Vegard’s RISC processor (AVR) microcontrollers. To achieve high-speed implementation, primitive operations, including rotation operation, a substitute layer, and a diffusion layer, are carefully optimized for the target low-end embedded processor. The proposed ARIA implementation supports the electronic codebook (ECB) and the counter (CTR) modes of operation. In particular, the CTR mode of operation is further optimized with the pre-computed table of two add-round-key, one substitute layer, and one diffusion layer operations. Finally, the proposed ARIA-CTR implementations on 8-bit AVR microcontrollers achieved 187.1, 216.8, and 246.6 clock cycles per byte for 128-bit, 192-bit, and 256-bit security levels, respectively. Compared with previous reference implementations, the execution timing is improved by 69.8%, 69.6%, and 69.5% for 128-bit, 192-bit, and 256-bit security levels, respectively.https://www.mdpi.com/1424-8220/20/13/3788ARIAelectronic codebook mode of operationcounter mode of operationsoftware implementationembedded processors |
| spellingShingle | Hwajeong Seo Hyeokdong Kwon Hyunji Kim Jaehoon Park ACE: ARIA-CTR Encryption for Low-End Embedded Processors Sensors ARIA electronic codebook mode of operation counter mode of operation software implementation embedded processors |
| title | ACE: ARIA-CTR Encryption for Low-End Embedded Processors |
| title_full | ACE: ARIA-CTR Encryption for Low-End Embedded Processors |
| title_fullStr | ACE: ARIA-CTR Encryption for Low-End Embedded Processors |
| title_full_unstemmed | ACE: ARIA-CTR Encryption for Low-End Embedded Processors |
| title_short | ACE: ARIA-CTR Encryption for Low-End Embedded Processors |
| title_sort | ace aria ctr encryption for low end embedded processors |
| topic | ARIA electronic codebook mode of operation counter mode of operation software implementation embedded processors |
| url | https://www.mdpi.com/1424-8220/20/13/3788 |
| work_keys_str_mv | AT hwajeongseo aceariactrencryptionforlowendembeddedprocessors AT hyeokdongkwon aceariactrencryptionforlowendembeddedprocessors AT hyunjikim aceariactrencryptionforlowendembeddedprocessors AT jaehoonpark aceariactrencryptionforlowendembeddedprocessors |