A 64-TOPS Energy-Efficient Tensor Accelerator in 14nm With Reconfigurable Fetch Network and Processing Fusion for Maximal Data Reuse
For energy-efficient accelerators in data centers that leverage advances in the performance and energy efficiency of recent algorithms, flexible architectures are critical to support state-of-the-art algorithms for various deep learning tasks. Due to the matrix multiplication units at the core of te...
Main Authors: | , , , , , , , , , , , , , , |
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Format: | Article |
Language: | English |
Published: |
IEEE
2022-01-01
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Series: | IEEE Open Journal of the Solid-State Circuits Society |
Subjects: | |
Online Access: | https://ieeexplore.ieee.org/document/9927346/ |