Design and implementation of an energy-efficient Keccak algorithm ASIC - Tuo Zhao; Chen Tao; Li Wei; Nan Longmei (Dianzi Jishu Yingyong, 2019)
The complete hardware circuit of Keccak algorithm which can support the four modes of SHA3 is designed and implemented. Based on the detailed analysis of the sponge functions and Keccak algorithm, the modular idea is used to divide the circuit structure into parallel filling modules and replacement modules, which reduces the clock cycle of task execution. Based on the designed Keccak algorithm hardware circuit as the basic structure, the three existing permutation function implementation structures are compared and analyzed from the aspect of energy efficiency. Integrated under the 65 nm process technology library, the SHA3-256 standard energy efficiency reaches 0.55 Mbps/gate, which is about 52% more energy efficient than existing structures.