Mitigation and Predictive Assessment of SET Immunity of Digital Logic Circuits for Space Missions
Due to the intrinsic masking effects of combinational circuits in digital designs, Single-Event Transient (SET) effects were considered irrelevant compared to the data rupture caused by Single-Event Upset (SEU) effects. However, the importance of considering SET in Very-Large-System-Integration (VLS...
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| Format: | Article |
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MDPI AG
2020-02-01
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| Series: | Aerospace |
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| Online Access: | https://www.mdpi.com/2226-4310/7/2/12 |
| _version_ | 1811222672061759488 |
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| author | Ygor Q. Aguiar Frédéric Wrobel Jean-Luc Autran Paul Leroux Frédéric Saigné Vincent Pouget Antoine D. Touboul |
| author_facet | Ygor Q. Aguiar Frédéric Wrobel Jean-Luc Autran Paul Leroux Frédéric Saigné Vincent Pouget Antoine D. Touboul |
| author_sort | Ygor Q. Aguiar |
| collection | DOAJ |
| description | Due to the intrinsic masking effects of combinational circuits in digital designs, Single-Event Transient (SET) effects were considered irrelevant compared to the data rupture caused by Single-Event Upset (SEU) effects. However, the importance of considering SET in Very-Large-System-Integration (VLSI) circuits increases given the reduction of the transistor dimensions and the logic data path depth in advanced technology nodes. Accordingly, the threat of SET in electronics systems for space applications must be carefully addressed along with the SEU characterization. In this work, a systematic prediction methodology to assess and improve the SET immunity of digital circuits is presented. Further, the applicability to full-custom and cell-based design methodologies are discussed, and an analysis based on signal probability and pin assignment is proposed to achieve a more application-efficient SET-aware optimization of synthesized circuits. For instance, a SET-aware pin assignment can provide a reduction of 37% and 16% on the SET rate of a NOR gate for a Geostationary Orbit (GEO) and the International Space Station (ISS) orbit, respectively. |
| first_indexed | 2024-04-12T08:19:20Z |
| format | Article |
| id | doaj.art-e03cc6de11ca46b38f5437bd3ff1379f |
| institution | Directory Open Access Journal |
| issn | 2226-4310 |
| language | English |
| last_indexed | 2024-04-12T08:19:20Z |
| publishDate | 2020-02-01 |
| publisher | MDPI AG |
| record_format | Article |
| series | Aerospace |
| spelling | doaj.art-e03cc6de11ca46b38f5437bd3ff1379f2022-12-22T03:40:40ZengMDPI AGAerospace2226-43102020-02-01721210.3390/aerospace7020012aerospace7020012Mitigation and Predictive Assessment of SET Immunity of Digital Logic Circuits for Space MissionsYgor Q. Aguiar0Frédéric Wrobel1Jean-Luc Autran2Paul Leroux3Frédéric Saigné4Vincent Pouget5Antoine D. Touboul6Institut d’Electronique et des Systèmes, Université de Montpellier, 5214, 860 Rue de St Priest, Bat. 5, F-34097 Montpellier, FranceInstitut d’Electronique et des Systèmes, Université de Montpellier, 5214, 860 Rue de St Priest, Bat. 5, F-34097 Montpellier, FranceInstitut Materiaux Microelectronique Nanoscience de Provence, Aix-Marseille Université, 13013 Marseille, FranceAdvanced Integrated Sensing Lab, KU Leuven University, 2440 Geel, BelgiumInstitut d’Electronique et des Systèmes, Université de Montpellier, 5214, 860 Rue de St Priest, Bat. 5, F-34097 Montpellier, FranceInstitut d’Electronique et des Systèmes, Université de Montpellier, 5214, 860 Rue de St Priest, Bat. 5, F-34097 Montpellier, FranceInstitut d’Electronique et des Systèmes, Université de Montpellier, 5214, 860 Rue de St Priest, Bat. 5, F-34097 Montpellier, FranceDue to the intrinsic masking effects of combinational circuits in digital designs, Single-Event Transient (SET) effects were considered irrelevant compared to the data rupture caused by Single-Event Upset (SEU) effects. However, the importance of considering SET in Very-Large-System-Integration (VLSI) circuits increases given the reduction of the transistor dimensions and the logic data path depth in advanced technology nodes. Accordingly, the threat of SET in electronics systems for space applications must be carefully addressed along with the SEU characterization. In this work, a systematic prediction methodology to assess and improve the SET immunity of digital circuits is presented. Further, the applicability to full-custom and cell-based design methodologies are discussed, and an analysis based on signal probability and pin assignment is proposed to achieve a more application-efficient SET-aware optimization of synthesized circuits. For instance, a SET-aware pin assignment can provide a reduction of 37% and 16% on the SET rate of a NOR gate for a Geostationary Orbit (GEO) and the International Space Station (ISS) orbit, respectively.https://www.mdpi.com/2226-4310/7/2/12monte carlo simulationsingle-event effectsradiation-hardening-by-design techniquesstandard-cell design methodologysignal probabilitymc-oracle |
| spellingShingle | Ygor Q. Aguiar Frédéric Wrobel Jean-Luc Autran Paul Leroux Frédéric Saigné Vincent Pouget Antoine D. Touboul Mitigation and Predictive Assessment of SET Immunity of Digital Logic Circuits for Space Missions Aerospace monte carlo simulation single-event effects radiation-hardening-by-design techniques standard-cell design methodology signal probability mc-oracle |
| title | Mitigation and Predictive Assessment of SET Immunity of Digital Logic Circuits for Space Missions |
| title_full | Mitigation and Predictive Assessment of SET Immunity of Digital Logic Circuits for Space Missions |
| title_fullStr | Mitigation and Predictive Assessment of SET Immunity of Digital Logic Circuits for Space Missions |
| title_full_unstemmed | Mitigation and Predictive Assessment of SET Immunity of Digital Logic Circuits for Space Missions |
| title_short | Mitigation and Predictive Assessment of SET Immunity of Digital Logic Circuits for Space Missions |
| title_sort | mitigation and predictive assessment of set immunity of digital logic circuits for space missions |
| topic | monte carlo simulation single-event effects radiation-hardening-by-design techniques standard-cell design methodology signal probability mc-oracle |
| url | https://www.mdpi.com/2226-4310/7/2/12 |
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