Pipeline Implementation of the Unified CORDIC Algorithm in FPGA
This work presents a pipeline implementation of the COordinate Rotation DIgital Computer (CORDIC) algorithm in VHDL. This implementation computes both the trigonometric (sine, cosine, and arctangent of two parameters) and hyperbolic (hyperbolic sine, hyperbolic cosine, and hyperbolic arctangent) fi...
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| Format: | Article |
| Language: | English |
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Universidad de Antioquia
2022-04-01
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| Series: | Revista Facultad de Ingeniería Universidad de Antioquia |
| Subjects: | |
| Online Access: | https://revistas.udea.edu.co/index.php/ingenieria/article/view/347194 |
| _version_ | 1797861853578133504 |
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| author | Wilson Javier Peréz-Holguín Robert Alexander Limas-Sierra |
| author_facet | Wilson Javier Peréz-Holguín Robert Alexander Limas-Sierra |
| author_sort | Wilson Javier Peréz-Holguín |
| collection | DOAJ |
| description |
This work presents a pipeline implementation of the COordinate Rotation DIgital Computer (CORDIC) algorithm in VHDL. This implementation computes both the trigonometric (sine, cosine, and arctangent of two parameters) and hyperbolic (hyperbolic sine, hyperbolic cosine, and hyperbolic arctangent) fixed-point functions. The implementation was synthesized on a Xilinx ® Zynq UltraScale + ZCU102 FPGA evaluation board, reaching an operating frequency of 297.89 MHz. The results show the proper operation of the proposed architecture, achieving relative errors of less than 1.4% for a 16-bit fixed-point representation. The VHDL implementation is easily adjustable to meet the specific requirements of each system and is available as an open-source code under a Creative Commons license.
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| first_indexed | 2024-04-09T22:11:07Z |
| format | Article |
| id | doaj.art-e049565373dd4d7092158318979697eb |
| institution | Directory Open Access Journal |
| issn | 0120-6230 2422-2844 |
| language | English |
| last_indexed | 2024-04-09T22:11:07Z |
| publishDate | 2022-04-01 |
| publisher | Universidad de Antioquia |
| record_format | Article |
| series | Revista Facultad de Ingeniería Universidad de Antioquia |
| spelling | doaj.art-e049565373dd4d7092158318979697eb2023-03-23T12:26:56ZengUniversidad de AntioquiaRevista Facultad de Ingeniería Universidad de Antioquia0120-62302422-28442022-04-0110.17533/udea.redin.20220474Pipeline Implementation of the Unified CORDIC Algorithm in FPGAWilson Javier Peréz-Holguín0Robert Alexander Limas-Sierra1Universidad Pedagógica y Tecnológica de ColombiaUniversidad Pedagógica y Tecnológica de Colombia This work presents a pipeline implementation of the COordinate Rotation DIgital Computer (CORDIC) algorithm in VHDL. This implementation computes both the trigonometric (sine, cosine, and arctangent of two parameters) and hyperbolic (hyperbolic sine, hyperbolic cosine, and hyperbolic arctangent) fixed-point functions. The implementation was synthesized on a Xilinx ® Zynq UltraScale + ZCU102 FPGA evaluation board, reaching an operating frequency of 297.89 MHz. The results show the proper operation of the proposed architecture, achieving relative errors of less than 1.4% for a 16-bit fixed-point representation. The VHDL implementation is easily adjustable to meet the specific requirements of each system and is available as an open-source code under a Creative Commons license. https://revistas.udea.edu.co/index.php/ingenieria/article/view/347194Unified CORDIC AlgorithmFPGAPipeline implementation |
| spellingShingle | Wilson Javier Peréz-Holguín Robert Alexander Limas-Sierra Pipeline Implementation of the Unified CORDIC Algorithm in FPGA Revista Facultad de Ingeniería Universidad de Antioquia Unified CORDIC Algorithm FPGA Pipeline implementation |
| title | Pipeline Implementation of the Unified CORDIC Algorithm in FPGA |
| title_full | Pipeline Implementation of the Unified CORDIC Algorithm in FPGA |
| title_fullStr | Pipeline Implementation of the Unified CORDIC Algorithm in FPGA |
| title_full_unstemmed | Pipeline Implementation of the Unified CORDIC Algorithm in FPGA |
| title_short | Pipeline Implementation of the Unified CORDIC Algorithm in FPGA |
| title_sort | pipeline implementation of the unified cordic algorithm in fpga |
| topic | Unified CORDIC Algorithm FPGA Pipeline implementation |
| url | https://revistas.udea.edu.co/index.php/ingenieria/article/view/347194 |
| work_keys_str_mv | AT wilsonjavierperezholguin pipelineimplementationoftheunifiedcordicalgorithminfpga AT robertalexanderlimassierra pipelineimplementationoftheunifiedcordicalgorithminfpga |