INCREASING COMBINATIONAL CIRCUIT PERFORMANCE VIA PIPELINING
The question of increasing performance of a device with no memory, which develops a sequence of discrete signals, is considered. A problem is set to divide a given multilevel combinational circuit into a given number of cascades with registers providing pipeline-wise development of incoming signals....
| Main Authors: | , |
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| Format: | Article |
| Language: | Russian |
| Published: |
The United Institute of Informatics Problems of the National Academy of Sciences of Belarus
2016-09-01
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| Series: | Informatika |
| Online Access: | https://inf.grid.by/jour/article/view/32 |
| _version_ | 1797877411307585536 |
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| author | Yu. V. Pottosin S. N. Kardash |
| author_facet | Yu. V. Pottosin S. N. Kardash |
| author_sort | Yu. V. Pottosin |
| collection | DOAJ |
| description | The question of increasing performance of a device with no memory, which develops a sequence of discrete signals, is considered. A problem is set to divide a given multilevel combinational circuit into a given number of cascades with registers providing pipeline-wise development of incoming signals. To solve this problem we use a model based on representation of combinational circuit as a directed graph. In the process of solving this problem, the frequency of incoming signals is established. This frequency must be as high as possible. |
| first_indexed | 2024-04-10T02:17:53Z |
| format | Article |
| id | doaj.art-e1a54339b00743fb81e53ab5db9ec73a |
| institution | Directory Open Access Journal |
| issn | 1816-0301 |
| language | Russian |
| last_indexed | 2024-04-10T02:17:53Z |
| publishDate | 2016-09-01 |
| publisher | The United Institute of Informatics Problems of the National Academy of Sciences of Belarus |
| record_format | Article |
| series | Informatika |
| spelling | doaj.art-e1a54339b00743fb81e53ab5db9ec73a2023-03-13T08:32:16ZrusThe United Institute of Informatics Problems of the National Academy of Sciences of BelarusInformatika1816-03012016-09-010111912831INCREASING COMBINATIONAL CIRCUIT PERFORMANCE VIA PIPELININGYu. V. Pottosin0S. N. Kardash1Объединенный институт проблем информатики НАН БеларусиОбъединенный институт проблем информатики НАН БеларусиThe question of increasing performance of a device with no memory, which develops a sequence of discrete signals, is considered. A problem is set to divide a given multilevel combinational circuit into a given number of cascades with registers providing pipeline-wise development of incoming signals. To solve this problem we use a model based on representation of combinational circuit as a directed graph. In the process of solving this problem, the frequency of incoming signals is established. This frequency must be as high as possible.https://inf.grid.by/jour/article/view/32 |
| spellingShingle | Yu. V. Pottosin S. N. Kardash INCREASING COMBINATIONAL CIRCUIT PERFORMANCE VIA PIPELINING Informatika |
| title | INCREASING COMBINATIONAL CIRCUIT PERFORMANCE VIA PIPELINING |
| title_full | INCREASING COMBINATIONAL CIRCUIT PERFORMANCE VIA PIPELINING |
| title_fullStr | INCREASING COMBINATIONAL CIRCUIT PERFORMANCE VIA PIPELINING |
| title_full_unstemmed | INCREASING COMBINATIONAL CIRCUIT PERFORMANCE VIA PIPELINING |
| title_short | INCREASING COMBINATIONAL CIRCUIT PERFORMANCE VIA PIPELINING |
| title_sort | increasing combinational circuit performance via pipelining |
| url | https://inf.grid.by/jour/article/view/32 |
| work_keys_str_mv | AT yuvpottosin increasingcombinationalcircuitperformanceviapipelining AT snkardash increasingcombinationalcircuitperformanceviapipelining |