Enabling Training of Neural Networks on Noisy Hardware
Deep neural networks (DNNs) are typically trained using the conventional stochastic gradient descent (SGD) algorithm. However, SGD performs poorly when applied to train networks on non-ideal analog hardware composed of resistive device arrays with non-symmetric conductance modulation characteristics...
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| Format: | Article |
| Language: | English |
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Frontiers Media S.A.
2021-09-01
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| Series: | Frontiers in Artificial Intelligence |
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| Online Access: | https://www.frontiersin.org/articles/10.3389/frai.2021.699148/full |
| _version_ | 1819131046530121728 |
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| author | Tayfun Gokmen |
| author_facet | Tayfun Gokmen |
| author_sort | Tayfun Gokmen |
| collection | DOAJ |
| description | Deep neural networks (DNNs) are typically trained using the conventional stochastic gradient descent (SGD) algorithm. However, SGD performs poorly when applied to train networks on non-ideal analog hardware composed of resistive device arrays with non-symmetric conductance modulation characteristics. Recently we proposed a new algorithm, the Tiki-Taka algorithm, that overcomes this stringent symmetry requirement. Here we build on top of Tiki-Taka and describe a more robust algorithm that further relaxes other stringent hardware requirements. This more robust second version of the Tiki-Taka algorithm (referred to as TTv2) 1. decreases the number of device conductance states requirement from 1000s of states to only 10s of states, 2. increases the noise tolerance to the device conductance modulations by about 100x, and 3. increases the noise tolerance to the matrix-vector multiplication performed by the analog arrays by about 10x. Empirical simulation results show that TTv2 can train various neural networks close to their ideal accuracy even at extremely noisy hardware settings. TTv2 achieves these capabilities by complementing the original Tiki-Taka algorithm with lightweight and low computational complexity digital filtering operations performed outside the analog arrays. Therefore, the implementation cost of TTv2 compared to SGD and Tiki-Taka is minimal, and it maintains the usual power and speed benefits of using analog hardware for training workloads. Here we also show how to extract the neural network from the analog hardware once the training is complete for further model deployment. Similar to Bayesian model averaging, we form analog hardware compatible averages over the neural network weights derived from TTv2 iterates. This model average then can be transferred to another analog or digital hardware with notable improvements in test accuracy, transcending the trained model itself. In short, we describe an end-to-end training and model extraction technique for extremely noisy crossbar-based analog hardware that can be used to accelerate DNN training workloads and match the performance of full-precision SGD. |
| first_indexed | 2024-12-22T09:09:17Z |
| format | Article |
| id | doaj.art-e2b78023d11d49d3a033492f0344d22a |
| institution | Directory Open Access Journal |
| issn | 2624-8212 |
| language | English |
| last_indexed | 2024-12-22T09:09:17Z |
| publishDate | 2021-09-01 |
| publisher | Frontiers Media S.A. |
| record_format | Article |
| series | Frontiers in Artificial Intelligence |
| spelling | doaj.art-e2b78023d11d49d3a033492f0344d22a2022-12-21T18:31:30ZengFrontiers Media S.A.Frontiers in Artificial Intelligence2624-82122021-09-01410.3389/frai.2021.699148699148Enabling Training of Neural Networks on Noisy HardwareTayfun GokmenDeep neural networks (DNNs) are typically trained using the conventional stochastic gradient descent (SGD) algorithm. However, SGD performs poorly when applied to train networks on non-ideal analog hardware composed of resistive device arrays with non-symmetric conductance modulation characteristics. Recently we proposed a new algorithm, the Tiki-Taka algorithm, that overcomes this stringent symmetry requirement. Here we build on top of Tiki-Taka and describe a more robust algorithm that further relaxes other stringent hardware requirements. This more robust second version of the Tiki-Taka algorithm (referred to as TTv2) 1. decreases the number of device conductance states requirement from 1000s of states to only 10s of states, 2. increases the noise tolerance to the device conductance modulations by about 100x, and 3. increases the noise tolerance to the matrix-vector multiplication performed by the analog arrays by about 10x. Empirical simulation results show that TTv2 can train various neural networks close to their ideal accuracy even at extremely noisy hardware settings. TTv2 achieves these capabilities by complementing the original Tiki-Taka algorithm with lightweight and low computational complexity digital filtering operations performed outside the analog arrays. Therefore, the implementation cost of TTv2 compared to SGD and Tiki-Taka is minimal, and it maintains the usual power and speed benefits of using analog hardware for training workloads. Here we also show how to extract the neural network from the analog hardware once the training is complete for further model deployment. Similar to Bayesian model averaging, we form analog hardware compatible averages over the neural network weights derived from TTv2 iterates. This model average then can be transferred to another analog or digital hardware with notable improvements in test accuracy, transcending the trained model itself. In short, we describe an end-to-end training and model extraction technique for extremely noisy crossbar-based analog hardware that can be used to accelerate DNN training workloads and match the performance of full-precision SGD.https://www.frontiersin.org/articles/10.3389/frai.2021.699148/fulllearning algorithmstraining algorithmsneural network accelerationBayesian neural networkin-memory computingon-chip learning |
| spellingShingle | Tayfun Gokmen Enabling Training of Neural Networks on Noisy Hardware Frontiers in Artificial Intelligence learning algorithms training algorithms neural network acceleration Bayesian neural network in-memory computing on-chip learning |
| title | Enabling Training of Neural Networks on Noisy Hardware |
| title_full | Enabling Training of Neural Networks on Noisy Hardware |
| title_fullStr | Enabling Training of Neural Networks on Noisy Hardware |
| title_full_unstemmed | Enabling Training of Neural Networks on Noisy Hardware |
| title_short | Enabling Training of Neural Networks on Noisy Hardware |
| title_sort | enabling training of neural networks on noisy hardware |
| topic | learning algorithms training algorithms neural network acceleration Bayesian neural network in-memory computing on-chip learning |
| url | https://www.frontiersin.org/articles/10.3389/frai.2021.699148/full |
| work_keys_str_mv | AT tayfungokmen enablingtrainingofneuralnetworksonnoisyhardware |