Four Hybrid Gates SOI Lateral Insulated Gate Bipolar Transistor With Improved Carrier Controllability
Easy inter-connection is a crucial advantage of the single-chip power ICs, which makes power devices with multiple ports easy to improve carrier controllability without increasing process difficulty. Electrical characteristics of the power devices get further improved thanks to the advanced carrier...
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| Format: | Article |
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IEEE
2023-01-01
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| Series: | IEEE Journal of the Electron Devices Society |
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| Online Access: | https://ieeexplore.ieee.org/document/10121749/ |
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| author | Jie Ma Yong Gu Chengwu Pan Long Zhang Guiqiang Zheng Siyang Liu Weifeng Sun Changyuan Chang Sen Zhang |
| author_facet | Jie Ma Yong Gu Chengwu Pan Long Zhang Guiqiang Zheng Siyang Liu Weifeng Sun Changyuan Chang Sen Zhang |
| author_sort | Jie Ma |
| collection | DOAJ |
| description | Easy inter-connection is a crucial advantage of the single-chip power ICs, which makes power devices with multiple ports easy to improve carrier controllability without increasing process difficulty. Electrical characteristics of the power devices get further improved thanks to the advanced carrier controllability. In this paper, a silicon-on-isolator lateral IGBT (SOI-LIGBT) featured four hybrid gates is proposed to obtain outstanding carrier controllability in turn-on, turn-off and short-circuit conditions for the first time. Four hybrid gates include three planar gates (G1, G2 and G3) and a trench gate (G4), of which G3 and G4 are grounded gate to lower saturation current and suppress latch up. Low turn-off time <inline-formula> <tex-math notation="LaTeX">$(t_{OFF})$ </tex-math></inline-formula>, di/dt and improved short-circuit withstanding capability are obtained through providing different input signals to these gates. In the turn-on, G2 is pre-charged to a stable voltage equal to gate voltage <inline-formula> <tex-math notation="LaTeX">$(V_{G1})$ </tex-math></inline-formula> to suppress the high di/dt before <inline-formula> <tex-math notation="LaTeX">$V_{G1}$ </tex-math></inline-formula> starts to rise. In the turn-off, a P-type inversion is induced by the negative voltage of <inline-formula> <tex-math notation="LaTeX">${\mathrm{ G}}_{2}~(V_{G2})$ </tex-math></inline-formula>, which provides a low-resistance hole current path to extract the stored holes. In the short-circuit condition, G3 and G4 are both shorted to the ground to lower the saturation current and suppress the activation of parasitic NPN transistor, resulting in an improved short-circuit withstanding time <inline-formula> <tex-math notation="LaTeX">$(t_{SC})$ </tex-math></inline-formula>. Compared with the conventional SOI-LIGBT, <inline-formula> <tex-math notation="LaTeX">$t_{OFF}$ </tex-math></inline-formula> and di/dt are reduced by 43.6% and 53.08%, and <inline-formula> <tex-math notation="LaTeX">$t_{SC}$ </tex-math></inline-formula> is prolonged from <inline-formula> <tex-math notation="LaTeX">$3.04\mu \text{s}$ </tex-math></inline-formula> to <inline-formula> <tex-math notation="LaTeX">$8.89\mu \text{s}$ </tex-math></inline-formula> at DC bus voltage of 400V. |
| first_indexed | 2024-03-13T06:00:36Z |
| format | Article |
| id | doaj.art-e2dcde30c3f04d4d9914fa0d777a600d |
| institution | Directory Open Access Journal |
| issn | 2168-6734 |
| language | English |
| last_indexed | 2024-03-13T06:00:36Z |
| publishDate | 2023-01-01 |
| publisher | IEEE |
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| series | IEEE Journal of the Electron Devices Society |
| spelling | doaj.art-e2dcde30c3f04d4d9914fa0d777a600d2023-06-12T23:00:47ZengIEEEIEEE Journal of the Electron Devices Society2168-67342023-01-011128829310.1109/JEDS.2023.327413310121749Four Hybrid Gates SOI Lateral Insulated Gate Bipolar Transistor With Improved Carrier ControllabilityJie Ma0Yong Gu1Chengwu Pan2Long Zhang3https://orcid.org/0000-0003-0254-6085Guiqiang Zheng4Siyang Liu5https://orcid.org/0000-0001-6498-9901Weifeng Sun6https://orcid.org/0000-0002-3289-8877Changyuan Chang7Sen Zhang8National ASIC System Engineering Research Center, School of Microelectronics, Southeast University, Nanjing, ChinaNational ASIC System Engineering Research Center, School of Microelectronics, Southeast University, Nanjing, ChinaNational ASIC System Engineering Research Center, School of Microelectronics, Southeast University, Nanjing, ChinaNational ASIC System Engineering Research Center, School of Microelectronics, Southeast University, Nanjing, ChinaNational ASIC System Engineering Research Center, School of Microelectronics, Southeast University, Nanjing, ChinaNational ASIC System Engineering Research Center, School of Electronic Science and Engineering, Southeast University, Nanjing, ChinaNational ASIC System Engineering Research Center, School of Electronic Science and Engineering, Southeast University, Nanjing, ChinaNational ASIC System Engineering Research Center, School of Microelectronics, Southeast University, Nanjing, ChinaDepartment of Technology Design, CSMC Technologies Corporation, Wuxi, ChinaEasy inter-connection is a crucial advantage of the single-chip power ICs, which makes power devices with multiple ports easy to improve carrier controllability without increasing process difficulty. Electrical characteristics of the power devices get further improved thanks to the advanced carrier controllability. In this paper, a silicon-on-isolator lateral IGBT (SOI-LIGBT) featured four hybrid gates is proposed to obtain outstanding carrier controllability in turn-on, turn-off and short-circuit conditions for the first time. Four hybrid gates include three planar gates (G1, G2 and G3) and a trench gate (G4), of which G3 and G4 are grounded gate to lower saturation current and suppress latch up. Low turn-off time <inline-formula> <tex-math notation="LaTeX">$(t_{OFF})$ </tex-math></inline-formula>, di/dt and improved short-circuit withstanding capability are obtained through providing different input signals to these gates. In the turn-on, G2 is pre-charged to a stable voltage equal to gate voltage <inline-formula> <tex-math notation="LaTeX">$(V_{G1})$ </tex-math></inline-formula> to suppress the high di/dt before <inline-formula> <tex-math notation="LaTeX">$V_{G1}$ </tex-math></inline-formula> starts to rise. In the turn-off, a P-type inversion is induced by the negative voltage of <inline-formula> <tex-math notation="LaTeX">${\mathrm{ G}}_{2}~(V_{G2})$ </tex-math></inline-formula>, which provides a low-resistance hole current path to extract the stored holes. In the short-circuit condition, G3 and G4 are both shorted to the ground to lower the saturation current and suppress the activation of parasitic NPN transistor, resulting in an improved short-circuit withstanding time <inline-formula> <tex-math notation="LaTeX">$(t_{SC})$ </tex-math></inline-formula>. Compared with the conventional SOI-LIGBT, <inline-formula> <tex-math notation="LaTeX">$t_{OFF}$ </tex-math></inline-formula> and di/dt are reduced by 43.6% and 53.08%, and <inline-formula> <tex-math notation="LaTeX">$t_{SC}$ </tex-math></inline-formula> is prolonged from <inline-formula> <tex-math notation="LaTeX">$3.04\mu \text{s}$ </tex-math></inline-formula> to <inline-formula> <tex-math notation="LaTeX">$8.89\mu \text{s}$ </tex-math></inline-formula> at DC bus voltage of 400V.https://ieeexplore.ieee.org/document/10121749/carrier controllabilityturn-ondi/dtturn-off timeshort-circuitshort-circuit withstanding time |
| spellingShingle | Jie Ma Yong Gu Chengwu Pan Long Zhang Guiqiang Zheng Siyang Liu Weifeng Sun Changyuan Chang Sen Zhang Four Hybrid Gates SOI Lateral Insulated Gate Bipolar Transistor With Improved Carrier Controllability IEEE Journal of the Electron Devices Society carrier controllability turn-on di/dt turn-off time short-circuit short-circuit withstanding time |
| title | Four Hybrid Gates SOI Lateral Insulated Gate Bipolar Transistor With Improved Carrier Controllability |
| title_full | Four Hybrid Gates SOI Lateral Insulated Gate Bipolar Transistor With Improved Carrier Controllability |
| title_fullStr | Four Hybrid Gates SOI Lateral Insulated Gate Bipolar Transistor With Improved Carrier Controllability |
| title_full_unstemmed | Four Hybrid Gates SOI Lateral Insulated Gate Bipolar Transistor With Improved Carrier Controllability |
| title_short | Four Hybrid Gates SOI Lateral Insulated Gate Bipolar Transistor With Improved Carrier Controllability |
| title_sort | four hybrid gates soi lateral insulated gate bipolar transistor with improved carrier controllability |
| topic | carrier controllability turn-on di/dt turn-off time short-circuit short-circuit withstanding time |
| url | https://ieeexplore.ieee.org/document/10121749/ |
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