On Model Order Reduction of Interconnect Circuit Network: A Fast and Accurate Method

The time cost in integrated circuit simulation is an important consideration in the design. This paper investigates the model order reduction of interconnect circuit networks to facilitate numerical analysis. A novel fast and accurate time reduced order model is proposed to simplify the interconnect...

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Main Authors: Xinsheng Wang, Shimin Fan, Ming-Zhe Dai, Chengxi Zhang
Format: Article
Language:English
Published: MDPI AG 2021-05-01
Series:Mathematics
Subjects:
Online Access:https://www.mdpi.com/2227-7390/9/11/1248
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author Xinsheng Wang
Shimin Fan
Ming-Zhe Dai
Chengxi Zhang
author_facet Xinsheng Wang
Shimin Fan
Ming-Zhe Dai
Chengxi Zhang
author_sort Xinsheng Wang
collection DOAJ
description The time cost in integrated circuit simulation is an important consideration in the design. This paper investigates the model order reduction of interconnect circuit networks to facilitate numerical analysis. A novel fast and accurate time reduced order model is proposed to simplify the interconnection network structure analysis and perform a fast simulation. The novelty of this study is the use of the power function sum to extend the approximate function to replace the original system’s state function. We give several simulations to verify the effectiveness of the algorithm. The innovation of this model is due to its use of the approximate function of power series expansion to replace the state function of the original system.
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spelling doaj.art-e38d7fffa16b48cca3657f35188f3b052023-11-21T21:59:38ZengMDPI AGMathematics2227-73902021-05-01911124810.3390/math9111248On Model Order Reduction of Interconnect Circuit Network: A Fast and Accurate MethodXinsheng Wang0Shimin Fan1Ming-Zhe Dai2Chengxi Zhang3Harbin Institute of Technology at Weihai, Weihai 264200, ChinaHarbin Institute of Technology at Weihai, Weihai 264200, ChinaThe School of Aeronautics and Astronautics, Central South University, Changsha 410083, ChinaThe School of Electronic and Information Engineering, Harbin Institute of Technology, Shenzhen 518055, ChinaThe time cost in integrated circuit simulation is an important consideration in the design. This paper investigates the model order reduction of interconnect circuit networks to facilitate numerical analysis. A novel fast and accurate time reduced order model is proposed to simplify the interconnection network structure analysis and perform a fast simulation. The novelty of this study is the use of the power function sum to extend the approximate function to replace the original system’s state function. We give several simulations to verify the effectiveness of the algorithm. The innovation of this model is due to its use of the approximate function of power series expansion to replace the state function of the original system.https://www.mdpi.com/2227-7390/9/11/1248model reductionstate variable analysis methodsquare error
spellingShingle Xinsheng Wang
Shimin Fan
Ming-Zhe Dai
Chengxi Zhang
On Model Order Reduction of Interconnect Circuit Network: A Fast and Accurate Method
Mathematics
model reduction
state variable analysis method
square error
title On Model Order Reduction of Interconnect Circuit Network: A Fast and Accurate Method
title_full On Model Order Reduction of Interconnect Circuit Network: A Fast and Accurate Method
title_fullStr On Model Order Reduction of Interconnect Circuit Network: A Fast and Accurate Method
title_full_unstemmed On Model Order Reduction of Interconnect Circuit Network: A Fast and Accurate Method
title_short On Model Order Reduction of Interconnect Circuit Network: A Fast and Accurate Method
title_sort on model order reduction of interconnect circuit network a fast and accurate method
topic model reduction
state variable analysis method
square error
url https://www.mdpi.com/2227-7390/9/11/1248
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AT mingzhedai onmodelorderreductionofinterconnectcircuitnetworkafastandaccuratemethod
AT chengxizhang onmodelorderreductionofinterconnectcircuitnetworkafastandaccuratemethod