An anti-power attack circuit design for block cipher

In order to improve the anti-power attack capability of the block cipher algorithm circuit, the concept of reverse interleaving is proposed based on the idea of masking technology. The key properties of reverse staggering are proved. An inverted interleaved circuit structure is designed, the timing...

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Bibliographic Details
Main Authors: Yan Yingjian, Zheng Zhen
Format: Article
Language:zho
Published: National Computer System Engineering Research Institute of China 2019-08-01
Series:Dianzi Jishu Yingyong
Subjects:
Online Access:http://www.chinaaet.com/article/3000107613
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author Yan Yingjian
Zheng Zhen
author_facet Yan Yingjian
Zheng Zhen
author_sort Yan Yingjian
collection DOAJ
description In order to improve the anti-power attack capability of the block cipher algorithm circuit, the concept of reverse interleaving is proposed based on the idea of masking technology. The key properties of reverse staggering are proved. An inverted interleaved circuit structure is designed, the timing alignment is disturbed by adding a first-level register, and an optimized circuit structure is obtained. The anti-energy attack capability of the algorithm is improved by power randomization. Finally, the structure is applied to the AES-128 algorithm circuit and verified by encryption, decryption, protection and computational performance. The results show that the circuit structure designed in this paper can be correctly encrypted and decrypted, and has better protection effect and computing performance.
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spelling doaj.art-e9fe91e5c78d4d3a896925c28f3c9e2d2022-12-21T20:04:50ZzhoNational Computer System Engineering Research Institute of ChinaDianzi Jishu Yingyong0258-79982019-08-0145810911210.16157/j.issn.0258-7998.1905463000107613An anti-power attack circuit design for block cipherYan YingjianZheng ZhenIn order to improve the anti-power attack capability of the block cipher algorithm circuit, the concept of reverse interleaving is proposed based on the idea of masking technology. The key properties of reverse staggering are proved. An inverted interleaved circuit structure is designed, the timing alignment is disturbed by adding a first-level register, and an optimized circuit structure is obtained. The anti-energy attack capability of the algorithm is improved by power randomization. Finally, the structure is applied to the AES-128 algorithm circuit and verified by encryption, decryption, protection and computational performance. The results show that the circuit structure designed in this paper can be correctly encrypted and decrypted, and has better protection effect and computing performance.http://www.chinaaet.com/article/3000107613block cipheranti-power analysis attack;masking techniquereverse interleavingpower randomization
spellingShingle Yan Yingjian
Zheng Zhen
An anti-power attack circuit design for block cipher
Dianzi Jishu Yingyong
block cipher
anti-power analysis attack;masking technique
reverse interleaving
power randomization
title An anti-power attack circuit design for block cipher
title_full An anti-power attack circuit design for block cipher
title_fullStr An anti-power attack circuit design for block cipher
title_full_unstemmed An anti-power attack circuit design for block cipher
title_short An anti-power attack circuit design for block cipher
title_sort anti power attack circuit design for block cipher
topic block cipher
anti-power analysis attack;masking technique
reverse interleaving
power randomization
url http://www.chinaaet.com/article/3000107613
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