Constrained Optimization of FPGA Design for Spaceborne InSAR Processing
With the development of spaceborne processing technologies, the demand for on-board processing has risen sharply. Against this background, spaceborne Interferometric Synthetic Aperture Radar (InSAR) processing has become an important research area. In many cases, high processing capacity is required...
| Main Authors: | , , , |
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| Format: | Article |
| Language: | English |
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MDPI AG
2022-09-01
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| Series: | Remote Sensing |
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| Online Access: | https://www.mdpi.com/2072-4292/14/19/4713 |
| _version_ | 1797477288328036352 |
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| author | Jiahao Li Ming Xu Yizhuang Xie He Chen |
| author_facet | Jiahao Li Ming Xu Yizhuang Xie He Chen |
| author_sort | Jiahao Li |
| collection | DOAJ |
| description | With the development of spaceborne processing technologies, the demand for on-board processing has risen sharply. Against this background, spaceborne Interferometric Synthetic Aperture Radar (InSAR) processing has become an important research area. In many cases, high processing capacity is required during on-board InSAR processing, yet Field-Programmable Gate Array (FPGA) resources on the satellites are limited. To improve the performance of spaceborne remote sensing processing, this paper designs a high-performing FPGA system for the coarse registration and interferogram generation process of InSAR. Moreover, to address this dual-constraint problem of resource and processing capacity, the paper proposes an FPGA design method based on the gradient descent theory, which can identify the optimum trade-off scheme between two such constraints. Finally, the proposed system design and method are implemented in FPGA. Experiments showed that the FPGA system outperformed the NVIDIA (Santa Clara, CA, USA) GTX Titan Black Graphics Processing Unit (GPU), and the optimum trade-off scheme only increases the entire time by 1.1% but reduces the FPGA BRAM usage by 8.7%. The experimental results proved the effectiveness and validity of the proposed system and method. |
| first_indexed | 2024-03-09T21:15:28Z |
| format | Article |
| id | doaj.art-f227c89c56684866bee454579e5c3272 |
| institution | Directory Open Access Journal |
| issn | 2072-4292 |
| language | English |
| last_indexed | 2024-03-09T21:15:28Z |
| publishDate | 2022-09-01 |
| publisher | MDPI AG |
| record_format | Article |
| series | Remote Sensing |
| spelling | doaj.art-f227c89c56684866bee454579e5c32722023-11-23T21:37:19ZengMDPI AGRemote Sensing2072-42922022-09-011419471310.3390/rs14194713Constrained Optimization of FPGA Design for Spaceborne InSAR ProcessingJiahao Li0Ming Xu1Yizhuang Xie2He Chen3Beijing Key Laboratory of Embedded Real-Time Information Processing Technology, Beijing Institute of Technology, Beijing 100081, ChinaBeijing Key Laboratory of Embedded Real-Time Information Processing Technology, Beijing Institute of Technology, Beijing 100081, ChinaBeijing Key Laboratory of Embedded Real-Time Information Processing Technology, Beijing Institute of Technology, Beijing 100081, ChinaBeijing Key Laboratory of Embedded Real-Time Information Processing Technology, Beijing Institute of Technology, Beijing 100081, ChinaWith the development of spaceborne processing technologies, the demand for on-board processing has risen sharply. Against this background, spaceborne Interferometric Synthetic Aperture Radar (InSAR) processing has become an important research area. In many cases, high processing capacity is required during on-board InSAR processing, yet Field-Programmable Gate Array (FPGA) resources on the satellites are limited. To improve the performance of spaceborne remote sensing processing, this paper designs a high-performing FPGA system for the coarse registration and interferogram generation process of InSAR. Moreover, to address this dual-constraint problem of resource and processing capacity, the paper proposes an FPGA design method based on the gradient descent theory, which can identify the optimum trade-off scheme between two such constraints. Finally, the proposed system design and method are implemented in FPGA. Experiments showed that the FPGA system outperformed the NVIDIA (Santa Clara, CA, USA) GTX Titan Black Graphics Processing Unit (GPU), and the optimum trade-off scheme only increases the entire time by 1.1% but reduces the FPGA BRAM usage by 8.7%. The experimental results proved the effectiveness and validity of the proposed system and method.https://www.mdpi.com/2072-4292/14/19/4713FPGAInSARdouble nonlinear constraintsgradient descentspaceborne processing |
| spellingShingle | Jiahao Li Ming Xu Yizhuang Xie He Chen Constrained Optimization of FPGA Design for Spaceborne InSAR Processing Remote Sensing FPGA InSAR double nonlinear constraints gradient descent spaceborne processing |
| title | Constrained Optimization of FPGA Design for Spaceborne InSAR Processing |
| title_full | Constrained Optimization of FPGA Design for Spaceborne InSAR Processing |
| title_fullStr | Constrained Optimization of FPGA Design for Spaceborne InSAR Processing |
| title_full_unstemmed | Constrained Optimization of FPGA Design for Spaceborne InSAR Processing |
| title_short | Constrained Optimization of FPGA Design for Spaceborne InSAR Processing |
| title_sort | constrained optimization of fpga design for spaceborne insar processing |
| topic | FPGA InSAR double nonlinear constraints gradient descent spaceborne processing |
| url | https://www.mdpi.com/2072-4292/14/19/4713 |
| work_keys_str_mv | AT jiahaoli constrainedoptimizationoffpgadesignforspaceborneinsarprocessing AT mingxu constrainedoptimizationoffpgadesignforspaceborneinsarprocessing AT yizhuangxie constrainedoptimizationoffpgadesignforspaceborneinsarprocessing AT hechen constrainedoptimizationoffpgadesignforspaceborneinsarprocessing |