DiSortNet: A Network Protocol With Distributed Sorting for Modular Multilevel Converters
Several authorsinvestigated the use of internal digital communication networks in Modular Multilevel Converters. The first works in this area keep a centralized control scheme, but they struggle to reach the fast cycle times required for achieving goodcontrol performance, specially as the number of...
| Main Authors: | , |
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| Format: | Article |
| Language: | English |
| Published: |
IEEE
2022-01-01
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| Series: | IEEE Open Journal of the Industrial Electronics Society |
| Subjects: | |
| Online Access: | https://ieeexplore.ieee.org/document/9760026/ |
| _version_ | 1797974803772080128 |
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| author | Tomas P. Correa Luis Almeida |
| author_facet | Tomas P. Correa Luis Almeida |
| author_sort | Tomas P. Correa |
| collection | DOAJ |
| description | Several authorsinvestigated the use of internal digital communication networks in Modular Multilevel Converters. The first works in this area keep a centralized control scheme, but they struggle to reach the fast cycle times required for achieving goodcontrol performance, specially as the number of cells increases. To reduce the network cycle time, some authors adopted a partly decentralized control scheme. However, those proposals restrict the capacitorbalancing to a closed-loop strategy and the use of carrier-based modulation. This work introduces DiSortNet, a novel Ethernet-based ring network protocol that achieves low cycle times while preserving the centralized control scheme and its modulation flexibility. DiSortNet emerges from a communications-control co-design approach, which main feature is the distributed sorting of capacitor voltages. We show that distributed sorting implies a marginal degradation in the balancing of capacitor voltages while bounding the network payload and reducing the cycle time. Implementation-wise, using FPGA-based network interfaces, DiSortNet achieves half the cycle-time obtained with EtherCAT in a network with 86 nodes and less than half for larger networks, reaching 157 μs with 300 nodes. |
| first_indexed | 2024-04-11T04:25:31Z |
| format | Article |
| id | doaj.art-f5eb5264cb9946539fae4b3fb1517e13 |
| institution | Directory Open Access Journal |
| issn | 2644-1284 |
| language | English |
| last_indexed | 2024-04-11T04:25:31Z |
| publishDate | 2022-01-01 |
| publisher | IEEE |
| record_format | Article |
| series | IEEE Open Journal of the Industrial Electronics Society |
| spelling | doaj.art-f5eb5264cb9946539fae4b3fb1517e132022-12-30T00:00:45ZengIEEEIEEE Open Journal of the Industrial Electronics Society2644-12842022-01-01322323510.1109/OJIES.2022.31682629760026DiSortNet: A Network Protocol With Distributed Sorting for Modular Multilevel ConvertersTomas P. Correa0https://orcid.org/0000-0002-3574-5972Luis Almeida1https://orcid.org/0000-0002-9544-3028Department of Electronic Engineering, Federal University of Minas Gerais, Belo Horizonte/MG, BrazilElectrical and Computer Engineering Department, Faculty of Engineering, University of Porto, Porto, PortugalSeveral authorsinvestigated the use of internal digital communication networks in Modular Multilevel Converters. The first works in this area keep a centralized control scheme, but they struggle to reach the fast cycle times required for achieving goodcontrol performance, specially as the number of cells increases. To reduce the network cycle time, some authors adopted a partly decentralized control scheme. However, those proposals restrict the capacitorbalancing to a closed-loop strategy and the use of carrier-based modulation. This work introduces DiSortNet, a novel Ethernet-based ring network protocol that achieves low cycle times while preserving the centralized control scheme and its modulation flexibility. DiSortNet emerges from a communications-control co-design approach, which main feature is the distributed sorting of capacitor voltages. We show that distributed sorting implies a marginal degradation in the balancing of capacitor voltages while bounding the network payload and reducing the cycle time. Implementation-wise, using FPGA-based network interfaces, DiSortNet achieves half the cycle-time obtained with EtherCAT in a network with 86 nodes and less than half for larger networks, reaching 157 μs with 300 nodes.https://ieeexplore.ieee.org/document/9760026/Digital communicationmodular multilevel convertermodulation |
| spellingShingle | Tomas P. Correa Luis Almeida DiSortNet: A Network Protocol With Distributed Sorting for Modular Multilevel Converters IEEE Open Journal of the Industrial Electronics Society Digital communication modular multilevel converter modulation |
| title | DiSortNet: A Network Protocol With Distributed Sorting for Modular Multilevel Converters |
| title_full | DiSortNet: A Network Protocol With Distributed Sorting for Modular Multilevel Converters |
| title_fullStr | DiSortNet: A Network Protocol With Distributed Sorting for Modular Multilevel Converters |
| title_full_unstemmed | DiSortNet: A Network Protocol With Distributed Sorting for Modular Multilevel Converters |
| title_short | DiSortNet: A Network Protocol With Distributed Sorting for Modular Multilevel Converters |
| title_sort | disortnet a network protocol with distributed sorting for modular multilevel converters |
| topic | Digital communication modular multilevel converter modulation |
| url | https://ieeexplore.ieee.org/document/9760026/ |
| work_keys_str_mv | AT tomaspcorrea disortnetanetworkprotocolwithdistributedsortingformodularmultilevelconverters AT luisalmeida disortnetanetworkprotocolwithdistributedsortingformodularmultilevelconverters |