Small Private Key MQPKS on an Embedded Microprocessor

Multivariate quadratic (MQ) cryptography requires the use of long public and private keys to ensure a sufficient security level, but this is not favorable to embedded systems, which have limited system resources. Recently, various approaches to MQ cryptography using reduced public keys have been stu...

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Main Authors: Hwajeong Seo, Jihyun Kim, Jongseok Choi, Taehwan Park, Zhe Liu, Howon Kim
Format: Article
Language:English
Published: MDPI AG 2014-03-01
Series:Sensors
Subjects:
Online Access:http://www.mdpi.com/1424-8220/14/3/5441
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author Hwajeong Seo
Jihyun Kim
Jongseok Choi
Taehwan Park
Zhe Liu
Howon Kim
author_facet Hwajeong Seo
Jihyun Kim
Jongseok Choi
Taehwan Park
Zhe Liu
Howon Kim
author_sort Hwajeong Seo
collection DOAJ
description Multivariate quadratic (MQ) cryptography requires the use of long public and private keys to ensure a sufficient security level, but this is not favorable to embedded systems, which have limited system resources. Recently, various approaches to MQ cryptography using reduced public keys have been studied. As a result of this, at CHES2011 (Cryptographic Hardware and Embedded Systems, 2011), a small public key MQ scheme, was proposed, and its feasible implementation on an embedded microprocessor was reported at CHES2012. However, the implementation of a small private key MQ scheme was not reported. For efficient implementation, random number generators can contribute to reduce the key size, but the cost of using a random number generator is much more complex than computing MQ on modern microprocessors. Therefore, no feasible results have been reported on embedded microprocessors. In this paper, we propose a feasible implementation on embedded microprocessors for a small private key MQ scheme using a pseudo-random number generator and hash function based on a block-cipher exploiting a hardware Advanced Encryption Standard (AES) accelerator. To speed up the performance, we apply various implementation methods, including parallel computation, on-the-fly computation, optimized logarithm representation, vinegar monomials and assembly programming. The proposed method reduces the private key size by about 99.9% and boosts signature generation and verification by 5.78% and 12.19% than previous results in CHES2012.
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spelling doaj.art-f5ffb0d29fb0451d9e55c11ac514435e2022-12-22T04:24:37ZengMDPI AGSensors1424-82202014-03-011435441545810.3390/s140305441s140305441Small Private Key MQPKS on an Embedded MicroprocessorHwajeong Seo0Jihyun Kim1Jongseok Choi2Taehwan Park3Zhe Liu4Howon Kim5Computer Engineering, Pusan National University, Pusan 609-735, KoreaComputer Engineering, Pusan National University, Pusan 609-735, KoreaComputer Engineering, Pusan National University, Pusan 609-735, KoreaComputer Engineering, Pusan National University, Pusan 609-735, KoreaLaboratory of Algorithmics, Cryptology and Security, University of Luxembourg, 6 Rue RichardCoudenhove-Kalergi, Luxembourg L–1359, LuxembourgComputer Engineering, Pusan National University, Pusan 609-735, KoreaMultivariate quadratic (MQ) cryptography requires the use of long public and private keys to ensure a sufficient security level, but this is not favorable to embedded systems, which have limited system resources. Recently, various approaches to MQ cryptography using reduced public keys have been studied. As a result of this, at CHES2011 (Cryptographic Hardware and Embedded Systems, 2011), a small public key MQ scheme, was proposed, and its feasible implementation on an embedded microprocessor was reported at CHES2012. However, the implementation of a small private key MQ scheme was not reported. For efficient implementation, random number generators can contribute to reduce the key size, but the cost of using a random number generator is much more complex than computing MQ on modern microprocessors. Therefore, no feasible results have been reported on embedded microprocessors. In this paper, we propose a feasible implementation on embedded microprocessors for a small private key MQ scheme using a pseudo-random number generator and hash function based on a block-cipher exploiting a hardware Advanced Encryption Standard (AES) accelerator. To speed up the performance, we apply various implementation methods, including parallel computation, on-the-fly computation, optimized logarithm representation, vinegar monomials and assembly programming. The proposed method reduces the private key size by about 99.9% and boosts signature generation and verification by 5.78% and 12.19% than previous results in CHES2012.http://www.mdpi.com/1424-8220/14/3/5441public key cryptographysmall private keymultivariate quadratic cryptographyembedded microprocessorefficient software implementationATxmega128a1AES acceleratorrandom number generatorsignature generation
spellingShingle Hwajeong Seo
Jihyun Kim
Jongseok Choi
Taehwan Park
Zhe Liu
Howon Kim
Small Private Key MQPKS on an Embedded Microprocessor
Sensors
public key cryptography
small private key
multivariate quadratic cryptography
embedded microprocessor
efficient software implementation
ATxmega128a1
AES accelerator
random number generator
signature generation
title Small Private Key MQPKS on an Embedded Microprocessor
title_full Small Private Key MQPKS on an Embedded Microprocessor
title_fullStr Small Private Key MQPKS on an Embedded Microprocessor
title_full_unstemmed Small Private Key MQPKS on an Embedded Microprocessor
title_short Small Private Key MQPKS on an Embedded Microprocessor
title_sort small private key mqpks on an embedded microprocessor
topic public key cryptography
small private key
multivariate quadratic cryptography
embedded microprocessor
efficient software implementation
ATxmega128a1
AES accelerator
random number generator
signature generation
url http://www.mdpi.com/1424-8220/14/3/5441
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