Design of 12-bit 6 GS/s high speed DAC with>63 dB SFDR in InP HBT
The paper presents a 12 bit 6 GS/s current-steering digital-to-analog converter(DAC) based on a 0.7 μm ft=280 GHz InP heterojunction bipolar transistor(HBT) technology. Current switch uses the new architecture to enlarge output impedance and make it stability. Besides, Deglitch circuit is used in DA...
| Main Authors: | , , , , |
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| Format: | Article |
| Language: | zho |
| Published: |
National Computer System Engineering Research Institute of China
2020-04-01
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| Series: | Dianzi Jishu Yingyong |
| Subjects: | |
| Online Access: | http://www.chinaaet.com/article/3000117589 |