Further Improvements in Decoding Performance for 5G LDPC Codes Based on Modified Check-Node Unit
One of the most important units of Low-Density Parity-Check (LDPC) decoders is the Check-Node Unit. Its main task is to find the first two minimum values among incoming variable-to-check messages and return check-to-variable messages. This block significantly affects the decoding performance, as wel...
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| Format: | Article |
| Language: | English |
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Spolecnost pro radioelektronicke inzenyrstvi
2023-06-01
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| Series: | Radioengineering |
| Subjects: | |
| Online Access: | https://www.radioeng.cz/fulltexts/2023/23_02_0226_0235.pdf |
| _version_ | 1797815137249263616 |
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| author | B. N. Tran-Thi T. T. Nguyen-Ly T. Hoang |
| author_facet | B. N. Tran-Thi T. T. Nguyen-Ly T. Hoang |
| author_sort | B. N. Tran-Thi |
| collection | DOAJ |
| description | One of the most important units of Low-Density Parity-Check (LDPC) decoders is the Check-Node Unit. Its main task is to find the first two minimum values among incoming variable-to-check messages and return check-to-variable messages. This block significantly affects the decoding performance, as well as the hardware implementation complexity. In this paper, we first propose a modification to the check-node update rule by introducing two optimal offset factors applied to the check-to-variable messages. Then, we present the Check-Node Unit hardware architecture which performs the proposed algorithm. The main objective of this work aims to improve further the decoding performance for 5th Generation (5G) LDPC codes. The simulation results show that the proposed algorithm achieves essential improvements in terms of error correction performance. More precisely, the error-floor does not appear within Bit-Error-Rate (BER) of 10^(-8), while the decoding gain increases up to 0.21 dB compared to the baseline Normalized Min-Sum, as well as several state-of-the-art LDPC-based Min-Sum decoders. |
| first_indexed | 2024-03-13T08:18:14Z |
| format | Article |
| id | doaj.art-f85b4ed762ca4e088bedca6886b0f256 |
| institution | Directory Open Access Journal |
| issn | 1210-2512 |
| language | English |
| last_indexed | 2024-03-13T08:18:14Z |
| publishDate | 2023-06-01 |
| publisher | Spolecnost pro radioelektronicke inzenyrstvi |
| record_format | Article |
| series | Radioengineering |
| spelling | doaj.art-f85b4ed762ca4e088bedca6886b0f2562023-05-31T12:58:06ZengSpolecnost pro radioelektronicke inzenyrstviRadioengineering1210-25122023-06-01322226235Further Improvements in Decoding Performance for 5G LDPC Codes Based on Modified Check-Node UnitB. N. Tran-ThiT. T. Nguyen-LyT. HoangOne of the most important units of Low-Density Parity-Check (LDPC) decoders is the Check-Node Unit. Its main task is to find the first two minimum values among incoming variable-to-check messages and return check-to-variable messages. This block significantly affects the decoding performance, as well as the hardware implementation complexity. In this paper, we first propose a modification to the check-node update rule by introducing two optimal offset factors applied to the check-to-variable messages. Then, we present the Check-Node Unit hardware architecture which performs the proposed algorithm. The main objective of this work aims to improve further the decoding performance for 5th Generation (5G) LDPC codes. The simulation results show that the proposed algorithm achieves essential improvements in terms of error correction performance. More precisely, the error-floor does not appear within Bit-Error-Rate (BER) of 10^(-8), while the decoding gain increases up to 0.21 dB compared to the baseline Normalized Min-Sum, as well as several state-of-the-art LDPC-based Min-Sum decoders.https://www.radioeng.cz/fulltexts/2023/23_02_0226_0235.pdfbit error ratecnu architectureldpc codeslow computational complexitymin-sum algorithmnormalized min-sum |
| spellingShingle | B. N. Tran-Thi T. T. Nguyen-Ly T. Hoang Further Improvements in Decoding Performance for 5G LDPC Codes Based on Modified Check-Node Unit Radioengineering bit error rate cnu architecture ldpc codes low computational complexity min-sum algorithm normalized min-sum |
| title | Further Improvements in Decoding Performance for 5G LDPC Codes Based on Modified Check-Node Unit |
| title_full | Further Improvements in Decoding Performance for 5G LDPC Codes Based on Modified Check-Node Unit |
| title_fullStr | Further Improvements in Decoding Performance for 5G LDPC Codes Based on Modified Check-Node Unit |
| title_full_unstemmed | Further Improvements in Decoding Performance for 5G LDPC Codes Based on Modified Check-Node Unit |
| title_short | Further Improvements in Decoding Performance for 5G LDPC Codes Based on Modified Check-Node Unit |
| title_sort | further improvements in decoding performance for 5g ldpc codes based on modified check node unit |
| topic | bit error rate cnu architecture ldpc codes low computational complexity min-sum algorithm normalized min-sum |
| url | https://www.radioeng.cz/fulltexts/2023/23_02_0226_0235.pdf |
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