Efficient-Scheduling Parallel Multiplier-Based Ring-LWE Cryptoprocessors
This paper presents a novel architecture for ring learning with errors (LWE) cryptoprocessors using an efficient approach in encryption and decryption operations. By scheduling multipliers to work in parallel, the encryption and decryption time are significantly reduced. In addition, polynomial mult...
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| Format: | Article |
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MDPI AG
2019-04-01
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| Series: | Electronics |
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| Online Access: | https://www.mdpi.com/2079-9292/8/4/413 |
| _version_ | 1798024444845752320 |
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| author | Tuy Nguyen Tan Hanho Lee |
| author_facet | Tuy Nguyen Tan Hanho Lee |
| author_sort | Tuy Nguyen Tan |
| collection | DOAJ |
| description | This paper presents a novel architecture for ring learning with errors (LWE) cryptoprocessors using an efficient approach in encryption and decryption operations. By scheduling multipliers to work in parallel, the encryption and decryption time are significantly reduced. In addition, polynomial multiplications are conducted using radix-2 and radix-8 multiple delay feedback (MDF) architecture-based number theoretic transform (NTT) multipliers to speed up the multiplication operation. To reduce the hardware complexity of an NTT multiplier, three bit-reverse operations during the NTT and inverse NTT (INTT) processes are removed. Polynomial additions in the ring-LWE encryption phase are also arranged to work simultaneously to reduce the latency. As a result, the proposed efficient-scheduling parallel multiplier-based ring-LWE cryptoprocessors can achieve higher throughput and efficiency compared with existing architectures. The proposed ring-LWE cryptoprocessors are synthesized and verified using Xilinx VIVADO on a Virtex-7 field programmable gate array (FPGA) board. With security parameters <inline-formula> <math display="inline"> <semantics> <mrow> <mi>n</mi> <mo>=</mo> <mn>512</mn> </mrow> </semantics> </math> </inline-formula> and <inline-formula> <math display="inline"> <semantics> <mrow> <mi>q</mi> <mo>=</mo> </mrow> </semantics> </math> </inline-formula> 12,289, the proposed cryptoprocessors using radix-2 single-path delay feedback (SDF), radix-2 MDF, and radix-8 MDF multipliers perform encryption in 4.58 <inline-formula> <math display="inline"> <semantics> <mi mathvariant="sans-serif">μ</mi> </semantics> </math> </inline-formula>s, 1.97 <inline-formula> <math display="inline"> <semantics> <mi mathvariant="sans-serif">μ</mi> </semantics> </math> </inline-formula>s, and 0.89 <inline-formula> <math display="inline"> <semantics> <mi mathvariant="sans-serif">μ</mi> </semantics> </math> </inline-formula>s, and decryption in 4.35 <inline-formula> <math display="inline"> <semantics> <mi mathvariant="sans-serif">μ</mi> </semantics> </math> </inline-formula>s, 1.82 <inline-formula> <math display="inline"> <semantics> <mi mathvariant="sans-serif">μ</mi> </semantics> </math> </inline-formula>s, and 0.71 <inline-formula> <math display="inline"> <semantics> <mi mathvariant="sans-serif">μ</mi> </semantics> </math> </inline-formula>s, respectively. A comparison of the obtained throughput and efficiency with those of previous studies proves that the proposed cryptoprocessors achieve a better performance. |
| first_indexed | 2024-04-11T18:02:38Z |
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| institution | Directory Open Access Journal |
| issn | 2079-9292 |
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| last_indexed | 2024-04-11T18:02:38Z |
| publishDate | 2019-04-01 |
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| series | Electronics |
| spelling | doaj.art-f9bd2312802745cc9cb62926a9f62a542022-12-22T04:10:26ZengMDPI AGElectronics2079-92922019-04-018441310.3390/electronics8040413electronics8040413Efficient-Scheduling Parallel Multiplier-Based Ring-LWE CryptoprocessorsTuy Nguyen Tan0Hanho Lee1Department of Information and Communication Engineering, Inha University, Incheon 22212, KoreaDepartment of Information and Communication Engineering, Inha University, Incheon 22212, KoreaThis paper presents a novel architecture for ring learning with errors (LWE) cryptoprocessors using an efficient approach in encryption and decryption operations. By scheduling multipliers to work in parallel, the encryption and decryption time are significantly reduced. In addition, polynomial multiplications are conducted using radix-2 and radix-8 multiple delay feedback (MDF) architecture-based number theoretic transform (NTT) multipliers to speed up the multiplication operation. To reduce the hardware complexity of an NTT multiplier, three bit-reverse operations during the NTT and inverse NTT (INTT) processes are removed. Polynomial additions in the ring-LWE encryption phase are also arranged to work simultaneously to reduce the latency. As a result, the proposed efficient-scheduling parallel multiplier-based ring-LWE cryptoprocessors can achieve higher throughput and efficiency compared with existing architectures. The proposed ring-LWE cryptoprocessors are synthesized and verified using Xilinx VIVADO on a Virtex-7 field programmable gate array (FPGA) board. With security parameters <inline-formula> <math display="inline"> <semantics> <mrow> <mi>n</mi> <mo>=</mo> <mn>512</mn> </mrow> </semantics> </math> </inline-formula> and <inline-formula> <math display="inline"> <semantics> <mrow> <mi>q</mi> <mo>=</mo> </mrow> </semantics> </math> </inline-formula> 12,289, the proposed cryptoprocessors using radix-2 single-path delay feedback (SDF), radix-2 MDF, and radix-8 MDF multipliers perform encryption in 4.58 <inline-formula> <math display="inline"> <semantics> <mi mathvariant="sans-serif">μ</mi> </semantics> </math> </inline-formula>s, 1.97 <inline-formula> <math display="inline"> <semantics> <mi mathvariant="sans-serif">μ</mi> </semantics> </math> </inline-formula>s, and 0.89 <inline-formula> <math display="inline"> <semantics> <mi mathvariant="sans-serif">μ</mi> </semantics> </math> </inline-formula>s, and decryption in 4.35 <inline-formula> <math display="inline"> <semantics> <mi mathvariant="sans-serif">μ</mi> </semantics> </math> </inline-formula>s, 1.82 <inline-formula> <math display="inline"> <semantics> <mi mathvariant="sans-serif">μ</mi> </semantics> </math> </inline-formula>s, and 0.71 <inline-formula> <math display="inline"> <semantics> <mi mathvariant="sans-serif">μ</mi> </semantics> </math> </inline-formula>s, respectively. A comparison of the obtained throughput and efficiency with those of previous studies proves that the proposed cryptoprocessors achieve a better performance.https://www.mdpi.com/2079-9292/8/4/413encryptiondecryptionnumber theoretic transformpolynomial multiplierring-learning with errors |
| spellingShingle | Tuy Nguyen Tan Hanho Lee Efficient-Scheduling Parallel Multiplier-Based Ring-LWE Cryptoprocessors Electronics encryption decryption number theoretic transform polynomial multiplier ring-learning with errors |
| title | Efficient-Scheduling Parallel Multiplier-Based Ring-LWE Cryptoprocessors |
| title_full | Efficient-Scheduling Parallel Multiplier-Based Ring-LWE Cryptoprocessors |
| title_fullStr | Efficient-Scheduling Parallel Multiplier-Based Ring-LWE Cryptoprocessors |
| title_full_unstemmed | Efficient-Scheduling Parallel Multiplier-Based Ring-LWE Cryptoprocessors |
| title_short | Efficient-Scheduling Parallel Multiplier-Based Ring-LWE Cryptoprocessors |
| title_sort | efficient scheduling parallel multiplier based ring lwe cryptoprocessors |
| topic | encryption decryption number theoretic transform polynomial multiplier ring-learning with errors |
| url | https://www.mdpi.com/2079-9292/8/4/413 |
| work_keys_str_mv | AT tuynguyentan efficientschedulingparallelmultiplierbasedringlwecryptoprocessors AT hanholee efficientschedulingparallelmultiplierbasedringlwecryptoprocessors |