Realization of universal periodic sequence generator on FPGA

This paper presents mathematical modeling and performance evaluation of different realizations of universal periodic digital signal generator based on infinite impulse response filter. The development kit used was Spartan 3E-Starter Board. Using Xilinx software environment and VHDL, the gen...

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Main Authors: Petrović Miljan, Jovanović Milica
Format: Article
Language:English
Published: Faculty of Technical Sciences in Cacak 2016-01-01
Series:Serbian Journal of Electrical Engineering
Subjects:
Online Access:http://www.doiserbia.nb.rs/img/doi/1451-4869/2016/1451-48691601059P.pdf
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author Petrović Miljan
Jovanović Milica
author_facet Petrović Miljan
Jovanović Milica
author_sort Petrović Miljan
collection DOAJ
description This paper presents mathematical modeling and performance evaluation of different realizations of universal periodic digital signal generator based on infinite impulse response filter. The development kit used was Spartan 3E-Starter Board. Using Xilinx software environment and VHDL, the generator has been described and then synthesized and implemented on FPGA chip on the board. Included realizations are direct form II (canonical form) of the filter, as well as hardware optimized single register structure with different control mechanism. Comparative analysis of these two digital systems points to their differences, advantages and weaknesses.
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spelling doaj.art-fc5882752cc04d84ace5c0558b5f62282022-12-22T01:44:09ZengFaculty of Technical Sciences in CacakSerbian Journal of Electrical Engineering1451-48692217-71832016-01-01131597010.2298/SJEE1601059P1451-48691601059PRealization of universal periodic sequence generator on FPGAPetrović Miljan0Jovanović Milica1Faculty of Electronic Engineering, NisFaculty of Electronic Engineering, NisThis paper presents mathematical modeling and performance evaluation of different realizations of universal periodic digital signal generator based on infinite impulse response filter. The development kit used was Spartan 3E-Starter Board. Using Xilinx software environment and VHDL, the generator has been described and then synthesized and implemented on FPGA chip on the board. Included realizations are direct form II (canonical form) of the filter, as well as hardware optimized single register structure with different control mechanism. Comparative analysis of these two digital systems points to their differences, advantages and weaknesses.http://www.doiserbia.nb.rs/img/doi/1451-4869/2016/1451-48691601059P.pdfFPGAIIR filterSignal generatorVHDL
spellingShingle Petrović Miljan
Jovanović Milica
Realization of universal periodic sequence generator on FPGA
Serbian Journal of Electrical Engineering
FPGA
IIR filter
Signal generator
VHDL
title Realization of universal periodic sequence generator on FPGA
title_full Realization of universal periodic sequence generator on FPGA
title_fullStr Realization of universal periodic sequence generator on FPGA
title_full_unstemmed Realization of universal periodic sequence generator on FPGA
title_short Realization of universal periodic sequence generator on FPGA
title_sort realization of universal periodic sequence generator on fpga
topic FPGA
IIR filter
Signal generator
VHDL
url http://www.doiserbia.nb.rs/img/doi/1451-4869/2016/1451-48691601059P.pdf
work_keys_str_mv AT petrovicmiljan realizationofuniversalperiodicsequencegeneratoronfpga
AT jovanovicmilica realizationofuniversalperiodicsequencegeneratoronfpga