An Energy-Efficient Current-Controlled Write and Read Scheme for Resistive RAMs (RRAMs)
Energy efficiency remains one of the main factors for improving the key performance markers of RRAMs to support IoT edge devices. This paper proposes a simple and feasible low power design scheme which can be used as a powerful tool for energy reduction in RRAM circuits. The design scheme is exclusi...
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Language: | English |
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IEEE
2020-01-01
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Series: | IEEE Access |
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Online Access: | https://ieeexplore.ieee.org/document/9146996/ |
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author | H. Aziza M. Moreau M. Fieback M. Taouil S. Hamdioui |
author_facet | H. Aziza M. Moreau M. Fieback M. Taouil S. Hamdioui |
author_sort | H. Aziza |
collection | DOAJ |
description | Energy efficiency remains one of the main factors for improving the key performance markers of RRAMs to support IoT edge devices. This paper proposes a simple and feasible low power design scheme which can be used as a powerful tool for energy reduction in RRAM circuits. The design scheme is exclusively based on current control during write and read operations and ensures that write operations are completed without wasted energy. Self-adaptive write termination circuits are proposed to control the RRAM current during FORMING, RESET and SET operations. The termination circuits sense the programming current and stop the write pulse as soon as a preferred programming current is reached. Simulation results demonstrate that an appropriate choice of the programming currents can help obtain <italic>4.1X</italic> improvement in FORMING, <italic>9.1X</italic> improvement in SET and <italic>1.12X</italic> improvement in RESET energy. Also, the possibility to have a tight control over the RESET resistance is demonstrated. READ energy optimization is also covered by leveraging on a differential sense amplifier offering a programmable current reference. Finally, an optimal trade-off between energy consumption during SET/RESET operations and an acceptable read margin is established according to the final application requirements. |
first_indexed | 2024-12-10T11:13:58Z |
format | Article |
id | doaj.art-fdca6ed8d2fc4b55b02ba52c16a99624 |
institution | Directory Open Access Journal |
issn | 2169-3536 |
language | English |
last_indexed | 2024-12-10T11:13:58Z |
publishDate | 2020-01-01 |
publisher | IEEE |
record_format | Article |
series | IEEE Access |
spelling | doaj.art-fdca6ed8d2fc4b55b02ba52c16a996242022-12-22T01:51:18ZengIEEEIEEE Access2169-35362020-01-01813726313727410.1109/ACCESS.2020.30116479146996An Energy-Efficient Current-Controlled Write and Read Scheme for Resistive RAMs (RRAMs)H. Aziza0https://orcid.org/0000-0002-8278-7462M. Moreau1https://orcid.org/0000-0002-2332-4273M. Fieback2https://orcid.org/0000-0002-9782-393XM. Taouil3https://orcid.org/0000-0002-9911-4846S. Hamdioui4https://orcid.org/0000-0002-8961-0387IM2NP, UMR CNRS 7334, Aix-Marseille University, Marseille, FranceIM2NP, UMR CNRS 7334, Aix-Marseille University, Marseille, FranceComputer Engineering Laboratory, Delft University of Technology, Delft, The NetherlandsComputer Engineering Laboratory, Delft University of Technology, Delft, The NetherlandsComputer Engineering Laboratory, Delft University of Technology, Delft, The NetherlandsEnergy efficiency remains one of the main factors for improving the key performance markers of RRAMs to support IoT edge devices. This paper proposes a simple and feasible low power design scheme which can be used as a powerful tool for energy reduction in RRAM circuits. The design scheme is exclusively based on current control during write and read operations and ensures that write operations are completed without wasted energy. Self-adaptive write termination circuits are proposed to control the RRAM current during FORMING, RESET and SET operations. The termination circuits sense the programming current and stop the write pulse as soon as a preferred programming current is reached. Simulation results demonstrate that an appropriate choice of the programming currents can help obtain <italic>4.1X</italic> improvement in FORMING, <italic>9.1X</italic> improvement in SET and <italic>1.12X</italic> improvement in RESET energy. Also, the possibility to have a tight control over the RESET resistance is demonstrated. READ energy optimization is also covered by leveraging on a differential sense amplifier offering a programmable current reference. Finally, an optimal trade-off between energy consumption during SET/RESET operations and an acceptable read margin is established according to the final application requirements.https://ieeexplore.ieee.org/document/9146996/Resistive RAM (ReRAM)RRAMOxRAMenergy optimizationwrite terminationprogramming current |
spellingShingle | H. Aziza M. Moreau M. Fieback M. Taouil S. Hamdioui An Energy-Efficient Current-Controlled Write and Read Scheme for Resistive RAMs (RRAMs) IEEE Access Resistive RAM (ReRAM) RRAM OxRAM energy optimization write termination programming current |
title | An Energy-Efficient Current-Controlled Write and Read Scheme for Resistive RAMs (RRAMs) |
title_full | An Energy-Efficient Current-Controlled Write and Read Scheme for Resistive RAMs (RRAMs) |
title_fullStr | An Energy-Efficient Current-Controlled Write and Read Scheme for Resistive RAMs (RRAMs) |
title_full_unstemmed | An Energy-Efficient Current-Controlled Write and Read Scheme for Resistive RAMs (RRAMs) |
title_short | An Energy-Efficient Current-Controlled Write and Read Scheme for Resistive RAMs (RRAMs) |
title_sort | energy efficient current controlled write and read scheme for resistive rams rrams |
topic | Resistive RAM (ReRAM) RRAM OxRAM energy optimization write termination programming current |
url | https://ieeexplore.ieee.org/document/9146996/ |
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