Performance comparison of selected wired and wireless networks on chip architectures

In this paper we compare performance intra-core communications in network on chips.We consider two alternative architectures, wired and wireless. The wired on is based on a common bus (ring) with all the cores attached to it. We compare it to the mesh (point-to-point) architecture based on THz wirel...

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Bibliographic Details
Main Author: Maria Komar
Format: Article
Language:English
Published: FRUCT 2015-04-01
Series:Proceedings of the XXth Conference of Open Innovations Association FRUCT
Subjects:
Online Access:https://www.fruct.org/publications/fruct17/files/Kom.pdf
Description
Summary:In this paper we compare performance intra-core communications in network on chips.We consider two alternative architectures, wired and wireless. The wired on is based on a common bus (ring) with all the cores attached to it. We compare it to the mesh (point-to-point) architecture based on THz wireless links operating in 0.1-0.54 frequency band. Using reference latencies of inter-core communications in modern CPUs we perform an applicability assessment of considered schemes. As performance metrics of interest we consider both delay and capacity. Our results indicate that the latter architecture outperforms the former by a singificant margin. The proposed system can be realized implementing directional antennas at all cores and ensuring that cores are placed on a chip such that there is no interference between them.
ISSN:2305-7254
2343-0737