Junction Design and Complementary Capacitance Matching for NCFET CMOS Logic

Junction Design and Complementary Capacitance Matching for NCFET CMOS Logic

Negative capacitance field effect transistors (NCFETs) are modeled in this study, with an emphasis on junction design, implications of complementary logic, and device <inline-formula> <tex-math notation="LaTeX">$V_{t}$ </tex-math></inline-formula> menu enablement. C...

Full description

Bibliographic Details
Main Authors: Reinaldo A. Vega, Takashi Ando, Timothy M. Philip
Format: Article
Language:English
Published: IEEE 2021-01-01
Series:IEEE Journal of the Electron Devices Society
Subjects:
Ferroelectric
negative capacitance
modeling
TCAD
capacitance matching
junction design
Online Access:https://ieeexplore.ieee.org/document/9478918/

Similar Items

Similar Items