Thread Migration Prediction for Distributed Shared Caches
Chip-multiprocessors (CMPs) have become the mainstream parallel architecture in recent years; for scalability reasons, designs with high core counts tend towards tiled CMPs with physically distributed shared caches. This naturally leads to a Non-Uniform Cache Access (NUCA) design, where on-chip acce...
Main Authors: | Shim, Keun Sup, Lis, Mieszko, Khan, Omer, Devadas, Srinivas |
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Other Authors: | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science |
Format: | Article |
Language: | en_US |
Published: |
Institute of Electrical and Electronics Engineers (IEEE)
2015
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Online Access: | http://hdl.handle.net/1721.1/100003 https://orcid.org/0000-0001-8253-7714 |
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