A 0.68V 0.68mW 2.4GHz PLL for ultra-low power RF systems

A 2.4GHz PLL consuming 0.68mW has been implemented in 65nm LPCMOS for use in ultra-low power Bluetooth Low Energy (BLE) applications. VCO, charge pump and dynamic flip-flop design optimization allow low voltage operation at 0.68V, bringing down dynamic power. The integer-N PLL covers all BLE channel...

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Main Authors: Paidimarri, Arun, Ickes, Nathan, Chandrakasan, Anantha P.
Other Authors: Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Format: Article
Language:en_US
Published: Institute of Electrical and Electronics Engineers (IEEE) 2015
Online Access:http://hdl.handle.net/1721.1/100251
https://orcid.org/0000-0003-0493-337X
https://orcid.org/0000-0002-5977-2748
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author Paidimarri, Arun
Ickes, Nathan
Chandrakasan, Anantha P.
author2 Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
author_facet Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Paidimarri, Arun
Ickes, Nathan
Chandrakasan, Anantha P.
author_sort Paidimarri, Arun
collection MIT
description A 2.4GHz PLL consuming 0.68mW has been implemented in 65nm LPCMOS for use in ultra-low power Bluetooth Low Energy (BLE) applications. VCO, charge pump and dynamic flip-flop design optimization allow low voltage operation at 0.68V, bringing down dynamic power. The integer-N PLL covers all BLE channels and has a phase noise of −110dBc/Hz at 1MHz offset. To extend operation to extremely low duty cycles, extensive power gating is applied to bring the leakage power down to 170pW.
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spelling mit-1721.1/1002512022-10-01T15:36:28Z A 0.68V 0.68mW 2.4GHz PLL for ultra-low power RF systems Paidimarri, Arun Ickes, Nathan Chandrakasan, Anantha P. Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science Massachusetts Institute of Technology. Microsystems Technology Laboratories Chandrakasan, Anantha P. Paidimarri, Arun Ickes, Nathan Chandrakasan, Anantha P. A 2.4GHz PLL consuming 0.68mW has been implemented in 65nm LPCMOS for use in ultra-low power Bluetooth Low Energy (BLE) applications. VCO, charge pump and dynamic flip-flop design optimization allow low voltage operation at 0.68V, bringing down dynamic power. The integer-N PLL covers all BLE channels and has a phase noise of −110dBc/Hz at 1MHz offset. To extend operation to extremely low duty cycles, extensive power gating is applied to bring the leakage power down to 170pW. Shell Oil Company Texas Instruments Incorporated 2015-12-14T22:44:31Z 2015-12-14T22:44:31Z 2015-05 Article http://purl.org/eprint/type/ConferencePaper 978-1-4799-7642-3 http://hdl.handle.net/1721.1/100251 Paidimarri, Arun, Nathan Ickes, and Anantha P. Chandrakasan. “A 0.68V 0.68mW 2.4GHz PLL for Ultra-Low Power RF Systems.” 2015 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) (May 2015). https://orcid.org/0000-0003-0493-337X https://orcid.org/0000-0002-5977-2748 en_US http://dx.doi.org/10.1109/RFIC.2015.7337789 Proceedings of the 2015 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Creative Commons Attribution-Noncommercial-Share Alike http://creativecommons.org/licenses/by-nc-sa/4.0/ application/pdf Institute of Electrical and Electronics Engineers (IEEE) Chandrakasan
spellingShingle Paidimarri, Arun
Ickes, Nathan
Chandrakasan, Anantha P.
A 0.68V 0.68mW 2.4GHz PLL for ultra-low power RF systems
title A 0.68V 0.68mW 2.4GHz PLL for ultra-low power RF systems
title_full A 0.68V 0.68mW 2.4GHz PLL for ultra-low power RF systems
title_fullStr A 0.68V 0.68mW 2.4GHz PLL for ultra-low power RF systems
title_full_unstemmed A 0.68V 0.68mW 2.4GHz PLL for ultra-low power RF systems
title_short A 0.68V 0.68mW 2.4GHz PLL for ultra-low power RF systems
title_sort 0 68v 0 68mw 2 4ghz pll for ultra low power rf systems
url http://hdl.handle.net/1721.1/100251
https://orcid.org/0000-0003-0493-337X
https://orcid.org/0000-0002-5977-2748
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