Reversible logic synthesis with minimal usage of ancilla bits

Reversible logic synthesis with minimal usage of ancilla bits

Thesis: M. Eng., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2015.

Bibliographic Details
Main Author:	Xu, Siyao, M.Eng. Massachusetts Institute of Technology
Other Authors:	Scott Aaronson.
Format:	Thesis
Language:	eng
Published:	Massachusetts Institute of Technology 2016
Subjects:	Electrical Engineering and Computer Science.
Online Access:	http://hdl.handle.net/1721.1/100615

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