Physical redundancy for defect tolerance : example designs and fundamental limits
Thesis: S.M., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2015.
| Main Author: | |
|---|---|
| Other Authors: | |
| Format: | Thesis |
| Language: | eng |
| Published: |
Massachusetts Institute of Technology
2016
|
| Subjects: | |
| Online Access: | http://hdl.handle.net/1721.1/101588 |
| _version_ | 1811084922425704448 |
|---|---|
| author | Tang, Jennifer (Jennifer Susan) |
| author2 | Yury Polyanskiy. |
| author_facet | Yury Polyanskiy. Tang, Jennifer (Jennifer Susan) |
| author_sort | Tang, Jennifer (Jennifer Susan) |
| collection | MIT |
| description | Thesis: S.M., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2015. |
| first_indexed | 2024-09-23T12:59:45Z |
| format | Thesis |
| id | mit-1721.1/101588 |
| institution | Massachusetts Institute of Technology |
| language | eng |
| last_indexed | 2024-09-23T12:59:45Z |
| publishDate | 2016 |
| publisher | Massachusetts Institute of Technology |
| record_format | dspace |
| spelling | mit-1721.1/1015882019-04-12T20:57:35Z Physical redundancy for defect tolerance : example designs and fundamental limits Tang, Jennifer (Jennifer Susan) Yury Polyanskiy. Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science. Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science. Electrical Engineering and Computer Science. Thesis: S.M., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2015. Cataloged from PDF version of thesis. Includes bibliographical references (page 75). This project analyzes designs for physical redundancy which are modeled abstractly as a bipartite graph. The goal is to determine the characteristics of graph structures which optimize the trade-off between the number of edges and the number of redundant components or nodes needed while correcting a deterministic number of worst-case errors. This thesis looks at finite-sized designs, asymptotically large designs with finite error correcting values, and designs with asymptotically large error correcting values. Results include some small optimal graph structures and fundamental limits on what the optimal design structure can achieve for the cases where a small number of errors are corrected and for where the number of errors to be correctly grows asymptotically. by Jennifer Tang. S.M. 2016-03-03T21:10:43Z 2016-03-03T21:10:43Z 2015 2015 Thesis http://hdl.handle.net/1721.1/101588 940982539 eng M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582 75 pages application/pdf Massachusetts Institute of Technology |
| spellingShingle | Electrical Engineering and Computer Science. Tang, Jennifer (Jennifer Susan) Physical redundancy for defect tolerance : example designs and fundamental limits |
| title | Physical redundancy for defect tolerance : example designs and fundamental limits |
| title_full | Physical redundancy for defect tolerance : example designs and fundamental limits |
| title_fullStr | Physical redundancy for defect tolerance : example designs and fundamental limits |
| title_full_unstemmed | Physical redundancy for defect tolerance : example designs and fundamental limits |
| title_short | Physical redundancy for defect tolerance : example designs and fundamental limits |
| title_sort | physical redundancy for defect tolerance example designs and fundamental limits |
| topic | Electrical Engineering and Computer Science. |
| url | http://hdl.handle.net/1721.1/101588 |
| work_keys_str_mv | AT tangjenniferjennifersusan physicalredundancyfordefecttoleranceexampledesignsandfundamentallimits |