A 28nm FDSOI integrated reconfigurable switched-capacitor based step-up DC-DC converter with 88% peak efficiency
This paper presents a fully integrated, reconfigurable switched-capacitor based step-up DC-DC converter in a 28nm FDSOI process. Three reconfigurable step-up conversion ratios (5/2, 2/1, 3/2) have been implemented which can provide a wide range of output voltage from 1.2V to 2.4V with a nominal inpu...
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| Format: | Article |
| Language: | en_US |
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Institute of Electrical and Electronics Engineers (IEEE)
2016
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| Online Access: | http://hdl.handle.net/1721.1/102279 https://orcid.org/0000-0002-6368-3684 https://orcid.org/0000-0002-5977-2748 |
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| author | Biswas, Avishek Sinangil, Yildiz Chandrakasan, Anantha P. |
| author2 | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science |
| author_facet | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science Biswas, Avishek Sinangil, Yildiz Chandrakasan, Anantha P. |
| author_sort | Biswas, Avishek |
| collection | MIT |
| description | This paper presents a fully integrated, reconfigurable switched-capacitor based step-up DC-DC converter in a 28nm FDSOI process. Three reconfigurable step-up conversion ratios (5/2, 2/1, 3/2) have been implemented which can provide a wide range of output voltage from 1.2V to 2.4V with a nominal input voltage of 1V. We propose a topology for the 5/2 mode which improves the efficiency by reducing the bottom-plate parasitic loss compared to a conventional series-parallel topology, while delivering the same amount of output power. Further, the proposed topology benefits from using core 1V devices for all charge-transfer switches without incurring any voltage overstress. The converter can deliver load current in the range of 10 μA to 500 μA, achieving a peak efficiency of 88%, using only on-chip MOS and MOM capacitors for a high density implementation. |
| first_indexed | 2024-09-23T15:01:05Z |
| format | Article |
| id | mit-1721.1/102279 |
| institution | Massachusetts Institute of Technology |
| language | en_US |
| last_indexed | 2024-09-23T15:01:05Z |
| publishDate | 2016 |
| publisher | Institute of Electrical and Electronics Engineers (IEEE) |
| record_format | dspace |
| spelling | mit-1721.1/1022792022-10-02T00:00:14Z A 28nm FDSOI integrated reconfigurable switched-capacitor based step-up DC-DC converter with 88% peak efficiency Biswas, Avishek Sinangil, Yildiz Chandrakasan, Anantha P. Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science Chandrakasan, Anantha P. Biswas, Avishek Sinangil, Yildiz Chandrakasan, Anantha P. This paper presents a fully integrated, reconfigurable switched-capacitor based step-up DC-DC converter in a 28nm FDSOI process. Three reconfigurable step-up conversion ratios (5/2, 2/1, 3/2) have been implemented which can provide a wide range of output voltage from 1.2V to 2.4V with a nominal input voltage of 1V. We propose a topology for the 5/2 mode which improves the efficiency by reducing the bottom-plate parasitic loss compared to a conventional series-parallel topology, while delivering the same amount of output power. Further, the proposed topology benefits from using core 1V devices for all charge-transfer switches without incurring any voltage overstress. The converter can deliver load current in the range of 10 μA to 500 μA, achieving a peak efficiency of 88%, using only on-chip MOS and MOM capacitors for a high density implementation. United States. Defense Advanced Research Projects Agency 2016-04-20T17:40:37Z 2016-04-20T17:40:37Z 2014-09 Article http://purl.org/eprint/type/ConferencePaper 978-1-4799-5696-8 978-1-4799-5694-4 http://hdl.handle.net/1721.1/102279 Biswas, Avishek, Yildiz Sinangil, and Anantha P. Chandrakasan. “A 28nm FDSOI Integrated Reconfigurable Switched-Capacitor Based Step-up DC-DC Converter with 88% Peak Efficiency.” ESSCIRC 2014 - 40th European Solid State Circuits Conference (ESSCIRC) (September 2014). https://orcid.org/0000-0002-6368-3684 https://orcid.org/0000-0002-5977-2748 en_US http://dx.doi.org/10.1109/ESSCIRC.2014.6942074 Proceedings of the 40th European Solid State Circuits Conference (ESSCIRC) Creative Commons Attribution-Noncommercial-Share Alike http://creativecommons.org/licenses/by-nc-sa/4.0/ application/pdf Institute of Electrical and Electronics Engineers (IEEE) Prof. Chandrakasan via Phoebe Ayers |
| spellingShingle | Biswas, Avishek Sinangil, Yildiz Chandrakasan, Anantha P. A 28nm FDSOI integrated reconfigurable switched-capacitor based step-up DC-DC converter with 88% peak efficiency |
| title | A 28nm FDSOI integrated reconfigurable switched-capacitor based step-up DC-DC converter with 88% peak efficiency |
| title_full | A 28nm FDSOI integrated reconfigurable switched-capacitor based step-up DC-DC converter with 88% peak efficiency |
| title_fullStr | A 28nm FDSOI integrated reconfigurable switched-capacitor based step-up DC-DC converter with 88% peak efficiency |
| title_full_unstemmed | A 28nm FDSOI integrated reconfigurable switched-capacitor based step-up DC-DC converter with 88% peak efficiency |
| title_short | A 28nm FDSOI integrated reconfigurable switched-capacitor based step-up DC-DC converter with 88% peak efficiency |
| title_sort | 28nm fdsoi integrated reconfigurable switched capacitor based step up dc dc converter with 88 peak efficiency |
| url | http://hdl.handle.net/1721.1/102279 https://orcid.org/0000-0002-6368-3684 https://orcid.org/0000-0002-5977-2748 |
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