A 12b 250 MS/s Pipelined ADC With Virtual Ground Reference Buffers
The virtual ground reference buffer (VGRB) technique is introduced as a means to improve the performance of switched-capacitor circuits. The technique enhances the performance by improving the feedback factor of the op-amp without affecting the signal gain. The bootstrapping action of the level-shif...
| Main Authors: | , , |
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| Other Authors: | |
| Format: | Article |
| Language: | en_US |
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Institute of Electrical and Electronics Engineers (IEEE)
2016
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| Online Access: | http://hdl.handle.net/1721.1/103067 https://orcid.org/0000-0002-7783-0403 https://orcid.org/0000-0002-0417-445X |
| _version_ | 1826202044658089984 |
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| author | Boo, Hyun Ho Boning, Duane S. Lee, Hae-Seung |
| author2 | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science |
| author_facet | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science Boo, Hyun Ho Boning, Duane S. Lee, Hae-Seung |
| author_sort | Boo, Hyun Ho |
| collection | MIT |
| description | The virtual ground reference buffer (VGRB) technique is introduced as a means to improve the performance of switched-capacitor circuits. The technique enhances the performance by improving the feedback factor of the op-amp without affecting the signal gain. The bootstrapping action of the level-shifting buffers relaxes key op-amp performance requirements including unity-gain bandwidth, noise, open-loop gain and offset compared with conventional circuits. This reduces the design complexity and the power consumption of op-amp based circuits. Based on this technique, a 12 b pipelined ADC is implemented in 65 nm CMOS that achieves 67.0 dB SNDR at 250 MS/s and consumes 49.7 mW of power from a 1.2 V power supply. |
| first_indexed | 2024-09-23T12:01:00Z |
| format | Article |
| id | mit-1721.1/103067 |
| institution | Massachusetts Institute of Technology |
| language | en_US |
| last_indexed | 2024-09-23T12:01:00Z |
| publishDate | 2016 |
| publisher | Institute of Electrical and Electronics Engineers (IEEE) |
| record_format | dspace |
| spelling | mit-1721.1/1030672022-10-01T07:38:50Z A 12b 250 MS/s Pipelined ADC With Virtual Ground Reference Buffers Boo, Hyun Ho Boning, Duane S. Lee, Hae-Seung Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science Boning, Duane S. Boo, Hyun Ho Boning, Duane S. Lee, Hae-Seung The virtual ground reference buffer (VGRB) technique is introduced as a means to improve the performance of switched-capacitor circuits. The technique enhances the performance by improving the feedback factor of the op-amp without affecting the signal gain. The bootstrapping action of the level-shifting buffers relaxes key op-amp performance requirements including unity-gain bandwidth, noise, open-loop gain and offset compared with conventional circuits. This reduces the design complexity and the power consumption of op-amp based circuits. Based on this technique, a 12 b pipelined ADC is implemented in 65 nm CMOS that achieves 67.0 dB SNDR at 250 MS/s and consumes 49.7 mW of power from a 1.2 V power supply. 2016-06-08T20:05:00Z 2016-06-08T20:05:00Z 2015-12 2015-06 Article http://purl.org/eprint/type/JournalArticle 0018-9200 1558-173X INSPEC Accession Number: 15618350 http://hdl.handle.net/1721.1/103067 Boo, Hyun H., Duane S. Boning, and Hae-Seung Lee. "A 12b 250 MS/s Pipelined ADC With Virtual Ground Reference Buffers." IEEE Journal of Solid-State Circuits 50:12 (2015), p.2912-2921. https://orcid.org/0000-0002-7783-0403 https://orcid.org/0000-0002-0417-445X en_US http://dx.doi.org/10.1109/JSSC.2015.2467183 IEEE Journal of Solid-State Circuits Creative Commons Attribution-Noncommercial-Share Alike http://creativecommons.org/licenses/by-nc-sa/4.0/ application/pdf Institute of Electrical and Electronics Engineers (IEEE) Prof. Duane Boning |
| spellingShingle | Boo, Hyun Ho Boning, Duane S. Lee, Hae-Seung A 12b 250 MS/s Pipelined ADC With Virtual Ground Reference Buffers |
| title | A 12b 250 MS/s Pipelined ADC With Virtual Ground Reference Buffers |
| title_full | A 12b 250 MS/s Pipelined ADC With Virtual Ground Reference Buffers |
| title_fullStr | A 12b 250 MS/s Pipelined ADC With Virtual Ground Reference Buffers |
| title_full_unstemmed | A 12b 250 MS/s Pipelined ADC With Virtual Ground Reference Buffers |
| title_short | A 12b 250 MS/s Pipelined ADC With Virtual Ground Reference Buffers |
| title_sort | 12b 250 ms s pipelined adc with virtual ground reference buffers |
| url | http://hdl.handle.net/1721.1/103067 https://orcid.org/0000-0002-7783-0403 https://orcid.org/0000-0002-0417-445X |
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