Stochastic Testing Method for Transistor-Level Uncertainty Quantification Based on Generalized Polynomial Chaos
Uncertainties have become a major concern in integrated circuit design. In order to avoid the huge number of repeated simulations in conventional Monte Carlo flows, this paper presents an intrusive spectral simulator for statistical circuit analysis. Our simulator employs the recently developed gene...
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| Format: | Article |
| Language: | en_US |
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Institute of Electrical and Electronics Engineers (IEEE)
2017
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| Online Access: | http://hdl.handle.net/1721.1/108401 https://orcid.org/0000-0002-5880-3151 |
| _version_ | 1811075851704336384 |
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| author | Elfadel, Ibrahim M. Zhang, Zheng El Moselhy, Tarek Ali Daniel, Luca |
| author2 | Massachusetts Institute of Technology. Department of Aeronautics and Astronautics |
| author_facet | Massachusetts Institute of Technology. Department of Aeronautics and Astronautics Elfadel, Ibrahim M. Zhang, Zheng El Moselhy, Tarek Ali Daniel, Luca |
| author_sort | Elfadel, Ibrahim M. |
| collection | MIT |
| description | Uncertainties have become a major concern in integrated circuit design. In order to avoid the huge number of repeated simulations in conventional Monte Carlo flows, this paper presents an intrusive spectral simulator for statistical circuit analysis. Our simulator employs the recently developed generalized polynomial chaos expansion to perform uncertainty quantification of nonlinear transistor circuits with both Gaussian and non-Gaussian random parameters. We modify the nonintrusive stochastic collocation (SC) method and develop an intrusive variant called stochastic testing (ST) method. Compared with the popular intrusive stochastic Galerkin (SG) method, the coupled deterministic equations resulting from our proposed ST method can be solved in a decoupled manner at each time point. At the same time, ST requires fewer samples and allows more flexible time step size controls than directly using a nonintrusive SC solver. These two properties make ST more efficient than SG and than existing SC methods, and more suitable for time-domain circuit simulation. Simulation results of several digital, analog and RF circuits are reported. Since our algorithm is based on generic mathematical models, the proposed ST algorithm can be applied to many other engineering problems. |
| first_indexed | 2024-09-23T10:12:50Z |
| format | Article |
| id | mit-1721.1/108401 |
| institution | Massachusetts Institute of Technology |
| language | en_US |
| last_indexed | 2024-09-23T10:12:50Z |
| publishDate | 2017 |
| publisher | Institute of Electrical and Electronics Engineers (IEEE) |
| record_format | dspace |
| spelling | mit-1721.1/1084012022-09-30T19:41:04Z Stochastic Testing Method for Transistor-Level Uncertainty Quantification Based on Generalized Polynomial Chaos Elfadel, Ibrahim M. Zhang, Zheng El Moselhy, Tarek Ali Daniel, Luca Massachusetts Institute of Technology. Department of Aeronautics and Astronautics Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science Daniel, Luca Zhang, Zheng El Moselhy, Tarek Ali Daniel, Luca Uncertainties have become a major concern in integrated circuit design. In order to avoid the huge number of repeated simulations in conventional Monte Carlo flows, this paper presents an intrusive spectral simulator for statistical circuit analysis. Our simulator employs the recently developed generalized polynomial chaos expansion to perform uncertainty quantification of nonlinear transistor circuits with both Gaussian and non-Gaussian random parameters. We modify the nonintrusive stochastic collocation (SC) method and develop an intrusive variant called stochastic testing (ST) method. Compared with the popular intrusive stochastic Galerkin (SG) method, the coupled deterministic equations resulting from our proposed ST method can be solved in a decoupled manner at each time point. At the same time, ST requires fewer samples and allows more flexible time step size controls than directly using a nonintrusive SC solver. These two properties make ST more efficient than SG and than existing SC methods, and more suitable for time-domain circuit simulation. Simulation results of several digital, analog and RF circuits are reported. Since our algorithm is based on generic mathematical models, the proposed ST algorithm can be applied to many other engineering problems. 2017-04-25T19:05:25Z 2017-04-25T19:05:25Z 2013-09 Article http://purl.org/eprint/type/JournalArticle 0278-0070 1937-4151 http://hdl.handle.net/1721.1/108401 Zhang, Zheng; El-Moselhy, Tarek A.; Elfadel, Ibrahim M. and Daniel, Luca. "Stochastic Testing Method for Transistor-Level Uncertainty Quantification Based on Generalized Polynomial Chaos." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 32, no. 10 (October 2013): 1533-1545. © 2013 Institute of Electrical and Electronics Engineers (IEEE) https://orcid.org/0000-0002-5880-3151 en_US http://dx.doi.org/10.1109/TCAD.2013.2263039 IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems Creative Commons Attribution-Noncommercial-Share Alike http://creativecommons.org/licenses/by-nc-sa/4.0/ application/pdf Institute of Electrical and Electronics Engineers (IEEE) Prof. Daniel via Phoebe Ayers |
| spellingShingle | Elfadel, Ibrahim M. Zhang, Zheng El Moselhy, Tarek Ali Daniel, Luca Stochastic Testing Method for Transistor-Level Uncertainty Quantification Based on Generalized Polynomial Chaos |
| title | Stochastic Testing Method for Transistor-Level Uncertainty Quantification Based on Generalized Polynomial Chaos |
| title_full | Stochastic Testing Method for Transistor-Level Uncertainty Quantification Based on Generalized Polynomial Chaos |
| title_fullStr | Stochastic Testing Method for Transistor-Level Uncertainty Quantification Based on Generalized Polynomial Chaos |
| title_full_unstemmed | Stochastic Testing Method for Transistor-Level Uncertainty Quantification Based on Generalized Polynomial Chaos |
| title_short | Stochastic Testing Method for Transistor-Level Uncertainty Quantification Based on Generalized Polynomial Chaos |
| title_sort | stochastic testing method for transistor level uncertainty quantification based on generalized polynomial chaos |
| url | http://hdl.handle.net/1721.1/108401 https://orcid.org/0000-0002-5880-3151 |
| work_keys_str_mv | AT elfadelibrahimm stochastictestingmethodfortransistorleveluncertaintyquantificationbasedongeneralizedpolynomialchaos AT zhangzheng stochastictestingmethodfortransistorleveluncertaintyquantificationbasedongeneralizedpolynomialchaos AT elmoselhytarekali stochastictestingmethodfortransistorleveluncertaintyquantificationbasedongeneralizedpolynomialchaos AT danielluca stochastictestingmethodfortransistorleveluncertaintyquantificationbasedongeneralizedpolynomialchaos |