A circular pipelined bus architecture for high-speed computation
Thesis (B.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1984.
| Main Author: | |
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| Other Authors: | |
| Format: | Thesis |
| Language: | eng |
| Published: |
Massachusetts Institute of Technology
2017
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| Subjects: | |
| Online Access: | http://hdl.handle.net/1721.1/109621 |
| _version_ | 1811087654767296512 |
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| author | Antaki, Patrick R |
| author2 | Stephen A. Ward. |
| author_facet | Stephen A. Ward. Antaki, Patrick R |
| author_sort | Antaki, Patrick R |
| collection | MIT |
| description | Thesis (B.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1984. |
| first_indexed | 2024-09-23T13:49:36Z |
| format | Thesis |
| id | mit-1721.1/109621 |
| institution | Massachusetts Institute of Technology |
| language | eng |
| last_indexed | 2024-09-23T13:49:36Z |
| publishDate | 2017 |
| publisher | Massachusetts Institute of Technology |
| record_format | dspace |
| spelling | mit-1721.1/1096212019-04-12T14:35:29Z A circular pipelined bus architecture for high-speed computation Antaki, Patrick R Stephen A. Ward. Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science. Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science. Electrical Engineering and Computer Science. Thesis (B.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1984. MICROFICHE COPY AVAILABLE IN ARCHIVES AND ENGINEERING. Bibliography: leaves 60-61. by Patrick R. Antaki. B.S. 2017-06-06T19:22:02Z 2017-06-06T19:22:02Z 1984 1984 Thesis http://hdl.handle.net/1721.1/109621 12718240 eng MIT theses are protected by copyright. They may be viewed, downloaded, or printed from this source but further reproduction or distribution in any format is prohibited without written permission. http://dspace.mit.edu/handle/1721.1/7582 61 leaves : ill. application/pdf Massachusetts Institute of Technology |
| spellingShingle | Electrical Engineering and Computer Science. Antaki, Patrick R A circular pipelined bus architecture for high-speed computation |
| title | A circular pipelined bus architecture for high-speed computation |
| title_full | A circular pipelined bus architecture for high-speed computation |
| title_fullStr | A circular pipelined bus architecture for high-speed computation |
| title_full_unstemmed | A circular pipelined bus architecture for high-speed computation |
| title_short | A circular pipelined bus architecture for high-speed computation |
| title_sort | circular pipelined bus architecture for high speed computation |
| topic | Electrical Engineering and Computer Science. |
| url | http://hdl.handle.net/1721.1/109621 |
| work_keys_str_mv | AT antakipatrickr acircularpipelinedbusarchitectureforhighspeedcomputation AT antakipatrickr circularpipelinedbusarchitectureforhighspeedcomputation |