Optimizing throughput architectures for speculative parallelism

Optimizing throughput architectures for speculative parallelism

Thesis: S.M., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2017.

Bibliographic Details
Main Author:	Abeydeera, Maleen Hasanka (Weeraratna Patabendige Maleen Hasanka)
Other Authors:	Daniel Sanchez.
Format:	Thesis
Language:	eng
Published:	Massachusetts Institute of Technology 2017
Subjects:	Electrical Engineering and Computer Science.
Online Access:	http://hdl.handle.net/1721.1/111930

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