Magnetic logic circuits with high bit resolution for hardware acceleration
Thesis: Ph. D., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2017.
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| Format: | Thesis |
| Language: | eng |
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Massachusetts Institute of Technology
2017
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| Online Access: | http://hdl.handle.net/1721.1/111997 |
| _version_ | 1811086397134602240 |
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| author | Dutta, Sumit, Ph. D. Massachusetts Institute of Technology |
| author2 | Marc A. Baldo. |
| author_facet | Marc A. Baldo. Dutta, Sumit, Ph. D. Massachusetts Institute of Technology |
| author_sort | Dutta, Sumit, Ph. D. Massachusetts Institute of Technology |
| collection | MIT |
| description | Thesis: Ph. D., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2017. |
| first_indexed | 2024-09-23T13:25:21Z |
| format | Thesis |
| id | mit-1721.1/111997 |
| institution | Massachusetts Institute of Technology |
| language | eng |
| last_indexed | 2024-09-23T13:25:21Z |
| publishDate | 2017 |
| publisher | Massachusetts Institute of Technology |
| record_format | dspace |
| spelling | mit-1721.1/1119972019-04-10T15:29:33Z Magnetic logic circuits with high bit resolution for hardware acceleration Dutta, Sumit, Ph. D. Massachusetts Institute of Technology Marc A. Baldo. Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science. Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science. Electrical Engineering and Computer Science. Thesis: Ph. D., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2017. This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections. Cataloged from student-submitted PDF version of thesis. Includes bibliographical references (pages 109-120). The ever-increasing demand for high-performance and low-power computing warrants an investigation of technologies beyond conventional digital transistor circuits. We explore a logic device based on magnetic domain walls, which are electrically movable boundaries between oppositely magnetized domains of a wire, for applications to hardware acceleration. A domain wall logic device takes current on the input, which moves a magnetic domain wall to a position in a ferromagnetic wire, and this position is the nonvolatile data token read as an output current through a magnetic tunnel junction. The spatial resolution of discrete magnetic domain wall positions in domain wall logic devices is studied to guide memory and logic applications. Theory, numerical modeling, and experiments on in-plane and perpendicularly magnetized materials demonstrate that the bit resolution, or analog information capacity, of a magnetic nanowire with a single domain wall is limited by the self-affine statistics of the wire edge roughness. The domain wall logic device is extended further into functional design implementations, including a logic-in-memory architecture to perform deep convolutional neural network operations in a hybrid process with magnetic devices and 45 nm CMOS. A 3-terminal magnetic logic device is designed to have a 3-bit resolution, and is used in conjunction with transistors in circuit designs for an ecient logic-in-memory system that can process convolutional neural networks 10 faster than conventional digital CMOS implementations. by Sumit Dutta. Ph. D. 2017-10-30T15:03:39Z 2017-10-30T15:03:39Z 2017 2017 Thesis http://hdl.handle.net/1721.1/111997 1006378330 eng MIT theses are protected by copyright. They may be viewed, downloaded, or printed from this source but further reproduction or distribution in any format is prohibited without written permission. http://dspace.mit.edu/handle/1721.1/7582 120 pages application/pdf Massachusetts Institute of Technology |
| spellingShingle | Electrical Engineering and Computer Science. Dutta, Sumit, Ph. D. Massachusetts Institute of Technology Magnetic logic circuits with high bit resolution for hardware acceleration |
| title | Magnetic logic circuits with high bit resolution for hardware acceleration |
| title_full | Magnetic logic circuits with high bit resolution for hardware acceleration |
| title_fullStr | Magnetic logic circuits with high bit resolution for hardware acceleration |
| title_full_unstemmed | Magnetic logic circuits with high bit resolution for hardware acceleration |
| title_short | Magnetic logic circuits with high bit resolution for hardware acceleration |
| title_sort | magnetic logic circuits with high bit resolution for hardware acceleration |
| topic | Electrical Engineering and Computer Science. |
| url | http://hdl.handle.net/1721.1/111997 |
| work_keys_str_mv | AT duttasumitphdmassachusettsinstituteoftechnology magneticlogiccircuitswithhighbitresolutionforhardwareacceleration |