High voltage sampling scheme independent of capacitor voltage coefficient for a delta sigma modulator

Thesis: M. Eng., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2017.

Bibliographic Details
Main Author: Uyehara, Chad P
Other Authors: Charles G. Sodini and Michael Kultgen.
Format: Thesis
Language:eng
Published: Massachusetts Institute of Technology 2018
Subjects:
Online Access:http://hdl.handle.net/1721.1/113539
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author Uyehara, Chad P
author2 Charles G. Sodini and Michael Kultgen.
author_facet Charles G. Sodini and Michael Kultgen.
Uyehara, Chad P
author_sort Uyehara, Chad P
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description Thesis: M. Eng., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2017.
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spelling mit-1721.1/1135392019-04-10T09:29:54Z High voltage sampling scheme independent of capacitor voltage coefficient for a delta sigma modulator Uyehara, Chad P Charles G. Sodini and Michael Kultgen. Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science. Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science. Electrical Engineering and Computer Science. Thesis: M. Eng., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2017. Cataloged from PDF version of thesis. Includes bibliographical references (page 32). The rapidly growing market of electric vehicles has motivated the research for safe and effective monitoring of large battery packs. This paper presents a unique sampling scheme for a delta sigma modulator that is independent of common mode voltage. The rejection of common mode voltage is important in the application of electric vehicles and other large battery packs in order to accurately measure every cell on the stack with varying common mode voltages. A switched capacitor implementation is the proposed solution, and simulations in Cadence provide the results. The simulations of the circuit supported the claim that it is independent of common mode voltage. The tradeoffs include degradation over temperature and signal level. The new topology also introduces the possibility of a less complex input bias cancellation circuit that can be researched in the future. by Chad P. Uyehara. M. Eng. 2018-02-08T16:28:16Z 2018-02-08T16:28:16Z 2017 2017 Thesis http://hdl.handle.net/1721.1/113539 1020174521 eng MIT theses are protected by copyright. They may be viewed, downloaded, or printed from this source but further reproduction or distribution in any format is prohibited without written permission. http://dspace.mit.edu/handle/1721.1/7582 32 pages application/pdf Massachusetts Institute of Technology
spellingShingle Electrical Engineering and Computer Science.
Uyehara, Chad P
High voltage sampling scheme independent of capacitor voltage coefficient for a delta sigma modulator
title High voltage sampling scheme independent of capacitor voltage coefficient for a delta sigma modulator
title_full High voltage sampling scheme independent of capacitor voltage coefficient for a delta sigma modulator
title_fullStr High voltage sampling scheme independent of capacitor voltage coefficient for a delta sigma modulator
title_full_unstemmed High voltage sampling scheme independent of capacitor voltage coefficient for a delta sigma modulator
title_short High voltage sampling scheme independent of capacitor voltage coefficient for a delta sigma modulator
title_sort high voltage sampling scheme independent of capacitor voltage coefficient for a delta sigma modulator
topic Electrical Engineering and Computer Science.
url http://hdl.handle.net/1721.1/113539
work_keys_str_mv AT uyeharachadp highvoltagesamplingschemeindependentofcapacitorvoltagecoefficientforadeltasigmamodulator