Epitaxial SiGe synapses for neuromorphic arrays

Epitaxial SiGe synapses for neuromorphic arrays

Thesis: S.M., Massachusetts Institute of Technology, Department of Mechanical Engineering, 2018.

Bibliographic Details
Main Author:	Tan, Scott H. (Scott Howard)
Other Authors:	Jeehwan Kim.
Format:	Thesis
Language:	eng
Published:	Massachusetts Institute of Technology 2018
Subjects:	Mechanical Engineering.
Online Access:	http://hdl.handle.net/1721.1/118687

Similar Items

Perspective: Uniform switching of artificial synapses for large-scale neuromorphic arrays
by: Tan, Scott H. (Scott Howard), et al.
Published: (2021)

Limited-area growth of Ge and SiGe on Si
by: Kim, Meekyung, Ph. D. Massachusetts Institute of Technology
Published: (2011)

Selective SiGe nanostructures
by: Langdo, Thomas Andrew, 1974-
Published: (2005)

Modeling and characterization of thermoelectric properties of SiGe nanocomposites
by: Lee, Hohyun, 1978-
Published: (2010)

Strain relaxation in SiGe/Si heteroepitaxy
by: Wong, Lydia Helena
Published: (2010)

Development of SiGe arrays for visible-near IR imaging applications
by: Sood, Ashok K., et al.
Published: (2011)

Simulation of neural networks for neuromorphic chip with crossbar array of RRAM synapses
by: Sreejith Kumar Ashish Jith
Published: (2019)

First-principles study of phonon drag effect in SiGe alloys
by: Xu, Qian,S. M.Massachusetts Institute of Technology.
Published: (2019)

Modelling and Simulation of Si/SiGe Heterostructure Devices
by: Abd. Rasheid, Norulhuda
Published: (2002)

Neuromorphic computing systems : crystalline resistive random access memory
by: Tan, Scott H.(Scott Howard)
Published: (2020)

Modeling study of thermoelectric SiGe nanocomposites
by: Minnich, Austin Jerome, et al.
Published: (2010)

SiGe-on-insulator and strained-Si-on-insulator for strained-Si CMOS and nanocrystalline-Ge waveguides
by: Taraschi, Gianni, 1973-
Published: (2005)

Modeling analysis of core-shell Si/SiGe nanowires
by: Tang, Ming Y., 1979-
Published: (2005)

MOSFET Channel Engineering using Strained Si, SiGe, and Ge Channels
by: Fitzgerald, Eugene A., et al.
Published: (2003)

Technology for SiGe heterostructure-based CMOS devices
by: Armstrong, Mark Albert
Published: (2005)

SiGe bandgap tuning for high speed eam
by: Mastronardi, Lorenzo, et al.
Published: (2019)

Erbium silicidation on SiGe for advanced MOS application
by: Yiew, Daphne Q. F., et al.
Published: (2013)

Nanoscale strained-Si/SiGe and double-gate MOSFET modeling
by: Karthik Chandrasekaran
Published: (2010)

Nanoscale Si/SiGe based quantum well infrared photodetectors
by: Agarwala, Shweta
Published: (2010)

SiGe-On-Insulator (SGOI) Technology and MOSFET Fabrication
by: Cheng, Zhiyuan, et al.
Published: (2003)

Development of low dark current SiGe-detector arrays for visible-NIR imaging sensor
by: Sood, Ashok K., et al.
Published: (2021)

Development of low dark current SiGe-detector arrays for visible-NIR imaging sensor
by: Sood, Ashok K., et al.
Published: (2010)

Development of low dark current SiGe-detector arrays for visible-NIR imaging sensor
by: Sood, Ashok K., et al.
Published: (2021)

Investigation of lateral gated quantum devices in Si/SiGe heterostructures
by: Lai, Andrew P. (Andrew Pan)
Published: (2014)

Multimode memtransistors as optoelectronic synapses for neuromorphic computing
by: Srilakshmi, Subramanian Periyal
Published: (2022)

SiGe electro-absorption modulators for applications at 1550nm
by: Bernardis, Sarah
Published: (2009)

MOSFET channel engineering using strained Si and strained Ge grown on SiGe virtual substrates
by: Lee, Minjoo Lawrence, 1976-
Published: (2005)

Study of nano-scale Si/SiGe structures for quantum cascade emitters
by: Lu, Fen
Published: (2010)

HFNet : a CNN architecture co-designed for neuromorphic hardware with a crossbar array of synapses
by: Gopalakrishnan, Roshan, et al.
Published: (2021)

Cluster expansion and optimization of thermal conductivity in SiGe nanowires
by: Chan, Maria K., et al.
Published: (2010)

SiGe-On-Insulator (SGOI): Two Structures for CMOS Application
by: Cheng, Zhiyuan, et al.
Published: (2003)

Substrate and channel engineering for improving performance of strained-SiGe MOSFETs
by: Gupta, Saurabh, Ph. D. Massachusetts Institute of Technology
Published: (2007)

Development of NTU CMOS process for SiGe BiCMOS technology
by: Wang, Jianpeng.
Published: (2008)

Effects of Platinum on NiPtSiGe/n-SiGe and NiPtSi/n-Si Schottky Contacts
by: Jin, Lijuan, et al.
Published: (2004)

Transport in thin-body MOSFETs fabricated in strained Si and strained Si/SiGe heterostructures on insulator
by: Åberg, Ingvar
Published: (2007)

Integration of III-V optical devices and interconnects on Si using SiGe virtual substrates
by: Yang, Vicky Kung-Fan, 1975-
Published: (2005)

Tradeoffs of the use of SiGe buffer layers in tandem GaAsP/Si solar cells
by: Polyzoeva, Evelina Aleksandrova
Published: (2017)

Design and characterization of Si/SiGe heterostructure sub-100 nm bulk p-MOSFET
by: Lee, Jae-kyu, Ph. D. Massachusetts Institute of Technology
Published: (2010)

The effect of surface conductance on lateral gated quantum devices in Si/SiGe heterostructures
by: Lin, Xi, et al.
Published: (2012)

Hole mobility and effective mass in SiGe heterostructure-based PMOS devices
by: Tanasa, Corina E. (Corina Elena), 1976-
Published: (2014)