An efficient implementation of a hierarchitcal weighted fair queue packet scheduler
Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1994.
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Format: | Thesis |
Language: | eng |
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Massachusetts Institute of Technology
2005
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Online Access: | http://hdl.handle.net/1721.1/12024 |
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author | Ndiaye, Oumar, 1966- |
author2 | David D. Clark. |
author_facet | David D. Clark. Ndiaye, Oumar, 1966- |
author_sort | Ndiaye, Oumar, 1966- |
collection | MIT |
description | Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1994. |
first_indexed | 2024-09-23T14:40:53Z |
format | Thesis |
id | mit-1721.1/12024 |
institution | Massachusetts Institute of Technology |
language | eng |
last_indexed | 2024-09-23T14:40:53Z |
publishDate | 2005 |
publisher | Massachusetts Institute of Technology |
record_format | dspace |
spelling | mit-1721.1/120242019-04-10T13:41:20Z An efficient implementation of a hierarchitcal weighted fair queue packet scheduler Ndiaye, Oumar, 1966- David D. Clark. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science Electrical Engineering and Computer Science Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1994. Includes bibliographical references (p. 77-78). by Oumar Ndiaye. M.S. 2005-08-16T21:58:20Z 2005-08-16T21:58:20Z 1994 1994 Thesis http://hdl.handle.net/1721.1/12024 31311540 eng M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582 78 p. 4236426 bytes 4236187 bytes application/pdf application/pdf application/pdf Massachusetts Institute of Technology |
spellingShingle | Electrical Engineering and Computer Science Ndiaye, Oumar, 1966- An efficient implementation of a hierarchitcal weighted fair queue packet scheduler |
title | An efficient implementation of a hierarchitcal weighted fair queue packet scheduler |
title_full | An efficient implementation of a hierarchitcal weighted fair queue packet scheduler |
title_fullStr | An efficient implementation of a hierarchitcal weighted fair queue packet scheduler |
title_full_unstemmed | An efficient implementation of a hierarchitcal weighted fair queue packet scheduler |
title_short | An efficient implementation of a hierarchitcal weighted fair queue packet scheduler |
title_sort | efficient implementation of a hierarchitcal weighted fair queue packet scheduler |
topic | Electrical Engineering and Computer Science |
url | http://hdl.handle.net/1721.1/12024 |
work_keys_str_mv | AT ndiayeoumar1966 anefficientimplementationofahierarchitcalweightedfairqueuepacketscheduler AT ndiayeoumar1966 efficientimplementationofahierarchitcalweightedfairqueuepacketscheduler |