Recode then LSB-first SAR ADC for Reducing Energy and Bit-cycles
Least Significant Bit-first (LSB-first) algorithm is suitable for low-activity signals as it reduces DAC activity and the number of bit-cycles required per conversion. However, certain code transitions degrade performance by requiring large switching energy and number of bit-cycles even when the cod...
Main Authors: | Khurana, Harneet Singh, Chandrakasan, Anantha P, Lee, Hae-Seung |
---|---|
Other Authors: | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science |
Format: | Article |
Published: |
Institute of Electrical and Electronics Engineers (IEEE)
2019
|
Online Access: | https://hdl.handle.net/1721.1/122461 |
Similar Items
-
S2ADC: A 12-bit, 1.25MS/s Secure SAR ADC with Power Side-Channel Attack Resistance
by: Jeong, Taehoon, et al.
Published: (2020) -
A Bit-level Sparsity-aware SAR ADC with Activity-scaling for AIoT Applications
by: Chen, Ruicong, et al.
Published: (2022) -
8 bit asynchronous SAR ADC
by: Mahesha, Ballaki Aditya
Published: (2024) -
A Resolution-Reconfigurable 5-to-10-Bit 0.4-to-1 V Power Scalable SAR ADC for Sensor Applications
by: Yip, Marcus, et al.
Published: (2015) -
Design of 8-bit SAR-ADC CMOS
by: Hassan, Hur A., et al.
Published: (2009)