Virtual wires--overcoming pin limitations in FPGA-based logic emulation
Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1994.
Main Author: | Babb, Jonathan William |
---|---|
Other Authors: | Anant Agarwal. |
Format: | Thesis |
Language: | eng |
Published: |
Massachusetts Institute of Technology
2005
|
Subjects: | |
Online Access: | http://hdl.handle.net/1721.1/12274 |
Similar Items
-
Virtual Wires: Overcoming Pin Limitations in FPGA-based Logic Emulation
by: Babb, Jonathan William
Published: (2023) -
Virtual Wires: Overcoming Pin Limitations in FPGA-based Logic Emulators
by: Babb, Jonathan, et al.
Published: (2023) -
InnerView hardware debugger : a logic analysis tool for the Virtual Wires emulation system
by: Hanono, Silvina Zimi
Published: (2005) -
An implementation of the virtual wires interconnect scheme
by: Dahl, Matthew Lyle
Published: (2005) -
Doppler channel emulation of high-bandwidth signals
by: Colosimo, Joseph William
Published: (2014)