FAB: Toward Flow-aware Buffer Sharing on Programmable Switches
Conventional buffer sizing techniques consider an output port with multiple queues in isolation and provide guidelines for the size of the queue. In practice, however, switches consist of several ports that share a buffering chip. Hence, chip manufacturers, such as Broadcom, are left to devise a set...
Main Author: | Ranjan, Manya |
---|---|
Other Authors: | Massachusetts Institute of Technology. Computer Science and Artificial Intelligence Laboratory |
Format: | Article |
Language: | English |
Published: |
ACM
2021
|
Online Access: | https://hdl.handle.net/1721.1/129525 |
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