MI6: Secure Enclaves in a Speculative Out-of-Order Processor
Recent attacks have broken process isolation by exploiting microarchitectural side channels that allow indirect access to shared microarchitectural state. Enclaves strengthen the process abstraction to restore isolation guarantees. We propose MI6, an aggressively speculative out-of-order processor c...
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Association for Computing Machinery (ACM)
2021
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Online Access: | https://hdl.handle.net/1721.1/130076 |
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author | Bourgeat, Thomas Lebedev, Ilia A. Wright, Andrew D. Zhang, Sizhuo Arvind Devadas, Srinivas |
author2 | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science |
author_facet | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science Bourgeat, Thomas Lebedev, Ilia A. Wright, Andrew D. Zhang, Sizhuo Arvind Devadas, Srinivas |
author_sort | Bourgeat, Thomas |
collection | MIT |
description | Recent attacks have broken process isolation by exploiting microarchitectural side channels that allow indirect access to shared microarchitectural state. Enclaves strengthen the process abstraction to restore isolation guarantees. We propose MI6, an aggressively speculative out-of-order processor capable of providing secure enclaves under a threat model that includes an untrusted OS and an attacker capable of mounting any software attack currently considered practical, including those utilizing control flow mis-speculation. MI6 is inspired by Sanctum [16] and extends its isolation guarantee to more realistic memory hierarchy. It also introduces a purge instruction, which is used only when a secure process is (de)scheduled, and implements it for a complex processor microarchitecture. We model the performance impact of enclaves in MI6 through FPGA emulation on AWS F1 FPGAs by running SPEC CINT2006 benchmarks as enclaves within an untrusted Linux OS. Security comes at the cost of approximately 16.4% average slowdown for protected programs. |
first_indexed | 2024-09-23T15:10:42Z |
format | Article |
id | mit-1721.1/130076 |
institution | Massachusetts Institute of Technology |
language | English |
last_indexed | 2024-09-23T15:10:42Z |
publishDate | 2021 |
publisher | Association for Computing Machinery (ACM) |
record_format | dspace |
spelling | mit-1721.1/1300762022-09-29T13:11:47Z MI6: Secure Enclaves in a Speculative Out-of-Order Processor Bourgeat, Thomas Lebedev, Ilia A. Wright, Andrew D. Zhang, Sizhuo Arvind Devadas, Srinivas Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science Massachusetts Institute of Technology. Computer Science and Artificial Intelligence Laboratory Recent attacks have broken process isolation by exploiting microarchitectural side channels that allow indirect access to shared microarchitectural state. Enclaves strengthen the process abstraction to restore isolation guarantees. We propose MI6, an aggressively speculative out-of-order processor capable of providing secure enclaves under a threat model that includes an untrusted OS and an attacker capable of mounting any software attack currently considered practical, including those utilizing control flow mis-speculation. MI6 is inspired by Sanctum [16] and extends its isolation guarantee to more realistic memory hierarchy. It also introduces a purge instruction, which is used only when a secure process is (de)scheduled, and implements it for a complex processor microarchitecture. We model the performance impact of enclaves in MI6 through FPGA emulation on AWS F1 FPGAs by running SPEC CINT2006 benchmarks as enclaves within an untrusted Linux OS. Security comes at the cost of approximately 16.4% average slowdown for protected programs. National Science Foundation (U.S.) (Grant CNS-1413920) United States. Space and Naval Warfare Systems Command (Contract N66001-15-C-4066) United States. Defense Advanced Research Projects Agency (Grant HR001118C0018) 2021-03-04T14:32:18Z 2021-03-04T14:32:18Z 2019-10 2020-12-09T19:12:10Z Article http://purl.org/eprint/type/ConferencePaper 9781450369381 https://hdl.handle.net/1721.1/130076 Bourgeat, Thomas et al. “MI6: Secure Enclaves in a Speculative Out-of-Order Processor.” Paper presented at the Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, Columbus OH, October 2019, Association for Computing Machinery: 42–56 © 2019 The Author(s) en 10.1145/3352460.3358310 Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture Creative Commons Attribution-Noncommercial-Share Alike http://creativecommons.org/licenses/by-nc-sa/4.0/ application/pdf Association for Computing Machinery (ACM) arXiv |
spellingShingle | Bourgeat, Thomas Lebedev, Ilia A. Wright, Andrew D. Zhang, Sizhuo Arvind Devadas, Srinivas MI6: Secure Enclaves in a Speculative Out-of-Order Processor |
title | MI6: Secure Enclaves in a Speculative Out-of-Order Processor |
title_full | MI6: Secure Enclaves in a Speculative Out-of-Order Processor |
title_fullStr | MI6: Secure Enclaves in a Speculative Out-of-Order Processor |
title_full_unstemmed | MI6: Secure Enclaves in a Speculative Out-of-Order Processor |
title_short | MI6: Secure Enclaves in a Speculative Out-of-Order Processor |
title_sort | mi6 secure enclaves in a speculative out of order processor |
url | https://hdl.handle.net/1721.1/130076 |
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