An Architecture-Level Energy and Area Estimator for Processing-In-Memory Accelerator Designs
Processing-in-memory (PIM) deep neural network (DNN) accelerators, which aim to improve energy/area efficiency of DNN processing by integrating computation into data storage, have gained popularity in recent years. Therefore, it is attractive to have a generally applicable framework that is able to...
Main Authors: | Wu, Yannan Nellie, Sze, Vivienne, Emer, Joel S. |
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Other Authors: | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science |
Format: | Article |
Language: | English |
Published: |
Institute of Electrical and Electronics Engineers (IEEE)
2021
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Online Access: | https://hdl.handle.net/1721.1/130413 |
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