A fault-tolerant shared memory system architecture for a Byzantine resilient computer

Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1989.

Bibliographic Details
Main Author: Butler, Bryan P. (Bryan Philip)
Other Authors: Thomas F. Knight, Jr.
Format: Thesis
Language:eng
Published: Massachusetts Institute of Technology 2005
Subjects:
Online Access:http://hdl.handle.net/1721.1/13360
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Butler, Bryan P. (Bryan Philip)
author_sort Butler, Bryan P. (Bryan Philip)
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description Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1989.
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spelling mit-1721.1/133602019-04-11T05:47:06Z A fault-tolerant shared memory system architecture for a Byzantine resilient computer Butler, Bryan P. (Bryan Philip) Thomas F. Knight, Jr. Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science Electrical Engineering and Computer Science Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1989. Includes bibliographical references (leaves 145-147). by Bryan P. Butler. M.S. 2005-09-21T21:44:06Z 2005-09-21T21:44:06Z 1989 1989 Thesis http://hdl.handle.net/1721.1/13360 25315340 eng M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582 147 leaves 11346383 bytes 11346141 bytes application/pdf application/pdf application/pdf Massachusetts Institute of Technology
spellingShingle Electrical Engineering and Computer Science
Butler, Bryan P. (Bryan Philip)
A fault-tolerant shared memory system architecture for a Byzantine resilient computer
title A fault-tolerant shared memory system architecture for a Byzantine resilient computer
title_full A fault-tolerant shared memory system architecture for a Byzantine resilient computer
title_fullStr A fault-tolerant shared memory system architecture for a Byzantine resilient computer
title_full_unstemmed A fault-tolerant shared memory system architecture for a Byzantine resilient computer
title_short A fault-tolerant shared memory system architecture for a Byzantine resilient computer
title_sort fault tolerant shared memory system architecture for a byzantine resilient computer
topic Electrical Engineering and Computer Science
url http://hdl.handle.net/1721.1/13360
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