A Fully Integrated Energy-Efficient H.265/HEVC Decoder With eDRAM for Wearable Devices
© 1966-2012 IEEE. This paper proposes a fully integrated H.265/high efficiency video coding (HEVC) video decoder that supports real-time video playback within the 50-mW power budget of wearable devices, such as smart watches and virtual reality (VR) headsets. Specifically, this paper focuses on redu...
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| Format: | Article |
| Language: | English |
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Institute of Electrical and Electronics Engineers (IEEE)
2021
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| Online Access: | https://hdl.handle.net/1721.1/135005 |
| _version_ | 1826214324105904128 |
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| author | Tikekar, Mehul Sze, Vivienne Chandrakasan, Anantha P |
| author2 | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science |
| author_facet | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science Tikekar, Mehul Sze, Vivienne Chandrakasan, Anantha P |
| author_sort | Tikekar, Mehul |
| collection | MIT |
| description | © 1966-2012 IEEE. This paper proposes a fully integrated H.265/high efficiency video coding (HEVC) video decoder that supports real-time video playback within the 50-mW power budget of wearable devices, such as smart watches and virtual reality (VR) headsets. Specifically, this paper focuses on reducing data movement to and from off-chip memory as it dominates energy consumption, consuming 2.8-6 times more energy than processing in most video decoders. Embedded dynamic random access memory (eDRAM) is used for main memory, and several techniques are proposed to reduce the power consumption of the eDRAM itself: 1) lossless compression is used to store reference frames in two times fewer eDRAM macros, reducing refresh power by 33%; 2) eDRAM macros are powered up on-demand to further reduce refresh power by 33%; and 3) syntax elements are distributed to four decoder cores in a partially compressed form to reduce decoupling buffer power by four times. These approaches reduce eDRAM power by two times in a fully integrated H.265/HEVC decoder with the lowest reported system power. The test chip containing 10.5 MB of eDRAM requires no external memory and consumes 24.9-30.6 mW for decoding 1920× 1080 video at 24-50 frames/s. |
| first_indexed | 2024-09-23T16:03:33Z |
| format | Article |
| id | mit-1721.1/135005 |
| institution | Massachusetts Institute of Technology |
| language | English |
| last_indexed | 2024-09-23T16:03:33Z |
| publishDate | 2021 |
| publisher | Institute of Electrical and Electronics Engineers (IEEE) |
| record_format | dspace |
| spelling | mit-1721.1/1350052023-01-11T18:44:10Z A Fully Integrated Energy-Efficient H.265/HEVC Decoder With eDRAM for Wearable Devices Tikekar, Mehul Sze, Vivienne Chandrakasan, Anantha P Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science © 1966-2012 IEEE. This paper proposes a fully integrated H.265/high efficiency video coding (HEVC) video decoder that supports real-time video playback within the 50-mW power budget of wearable devices, such as smart watches and virtual reality (VR) headsets. Specifically, this paper focuses on reducing data movement to and from off-chip memory as it dominates energy consumption, consuming 2.8-6 times more energy than processing in most video decoders. Embedded dynamic random access memory (eDRAM) is used for main memory, and several techniques are proposed to reduce the power consumption of the eDRAM itself: 1) lossless compression is used to store reference frames in two times fewer eDRAM macros, reducing refresh power by 33%; 2) eDRAM macros are powered up on-demand to further reduce refresh power by 33%; and 3) syntax elements are distributed to four decoder cores in a partially compressed form to reduce decoupling buffer power by four times. These approaches reduce eDRAM power by two times in a fully integrated H.265/HEVC decoder with the lowest reported system power. The test chip containing 10.5 MB of eDRAM requires no external memory and consumes 24.9-30.6 mW for decoding 1920× 1080 video at 24-50 frames/s. 2021-10-27T20:10:16Z 2021-10-27T20:10:16Z 2018 2019-05-22T16:05:15Z Article http://purl.org/eprint/type/JournalArticle https://hdl.handle.net/1721.1/135005 en 10.1109/JSSC.2018.2837124 IEEE Journal of Solid-State Circuits Creative Commons Attribution-Noncommercial-Share Alike http://creativecommons.org/licenses/by-nc-sa/4.0/ application/pdf Institute of Electrical and Electronics Engineers (IEEE) Other repository |
| spellingShingle | Tikekar, Mehul Sze, Vivienne Chandrakasan, Anantha P A Fully Integrated Energy-Efficient H.265/HEVC Decoder With eDRAM for Wearable Devices |
| title | A Fully Integrated Energy-Efficient H.265/HEVC Decoder With eDRAM for Wearable Devices |
| title_full | A Fully Integrated Energy-Efficient H.265/HEVC Decoder With eDRAM for Wearable Devices |
| title_fullStr | A Fully Integrated Energy-Efficient H.265/HEVC Decoder With eDRAM for Wearable Devices |
| title_full_unstemmed | A Fully Integrated Energy-Efficient H.265/HEVC Decoder With eDRAM for Wearable Devices |
| title_short | A Fully Integrated Energy-Efficient H.265/HEVC Decoder With eDRAM for Wearable Devices |
| title_sort | fully integrated energy efficient h 265 hevc decoder with edram for wearable devices |
| url | https://hdl.handle.net/1721.1/135005 |
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