Author restrospective AEGIS: architecture for tamper-evident and tamper-resistant processing

Author restrospective AEGIS: architecture for tamper-evident and tamper-resistant processing

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AEGIS is a single-chip secure processor that can be used to protect the integrity and confidentiality of an application program from both physical and software attacks. We briefly describe the history behind this architecture and its key features, discuss main observations and lessons from the proje...

書誌詳細
主要な著者:	Suh, G. Edward, Fletcher, Christopher, Clarke, Dwaine, Gassend, Blaise, van Dijk, Marten, Devadas, Srinivas
その他の著者:	Massachusetts Institute of Technology. Computer Science and Artificial Intelligence Laboratory
フォーマット:	論文
言語:	English
出版事項:	Association for Computing Machinery (ACM) 2021
オンライン･アクセス:	https://hdl.handle.net/1721.1/137542

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