A high-performance retargetable simulator for parallel architectures

A high-performance retargetable simulator for parallel architectures

Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1991.

Bibliographic Details
Main Author:	Dellarocas, Chrysanthos, 1967-
Other Authors:	William E. Weihl.
Format:	Thesis
Language:	eng
Published:	Massachusetts Institute of Technology 2005
Subjects:	Electrical Engineering and Computer Science
Online Access:	http://hdl.handle.net/1721.1/13945

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