Modular SMT-Based Verification of Rule-Based Hardware Designs
The highly-concurrent nature of hardware logic designs makes their design and verification difficult. Bluespec SystemVerilog (BSV) simplifies this problem by introducing the rule-level abstraction. Modules are expressed in terms of guarded atomic actions that appear to fire in a sequential order, ev...
Main Author: | Wright, Andrew C. |
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Other Authors: | Arvind |
Format: | Thesis |
Published: |
Massachusetts Institute of Technology
2022
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Online Access: | https://hdl.handle.net/1721.1/139491 |
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